- Boeing (Berkeley, MO)
- …position is hiring for multiple levels including; Associate Level, Experienced Level, and Senior Level. This role is looking to hire software engineers capable of ... Integration / Continuous Deployment (CI/CD) software build pipeline using an agile methodology focused on code quality, security and automation. Key Capability areas… more
- NVIDIA (Santa Clara, CA)
- …our life's work, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off ... IR drop etc. + Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated strategies of signing off… more
- NVIDIA (Santa Clara, CA)
- …our life's work, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off ... an ideal role. What You'll Be Doing: + Develop Timing sign-off flows, constraints and QOR metrics for custom...using standard cells and custom designs. + Validating the timing of custom circuit design using NanoTime and various… more
- Google (Sunnyvale, CA)
- Senior DFT Static Timing Analysis Engineer , Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, ... ensure successful timing closure. + Participate in both static timing analysis methodology development and support, as well as chip implementation and … more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Test Timing Engineer to join our dynamic and growing ... as ECO implementation + Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS (or… more
- NVIDIA (Santa Clara, CA)
- …our life's work, to amplify human inventiveness and intelligence. NVIDIA's ASIC-PD Methodology organization is driving the next generation of AI-assisted timing ... closure across multi-billion transistor chips. We are seeking an Applied AI Engineer to lead end-to-end solution development - spanning data generation, model… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... with multiple teams. + Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS (or… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Custom Timing Engineer to join our dynamic and growing Circuit Solutions Group! If you are looking for a ... performance and reliability of Nvidia's next generation products. + Develop timing models and methodology for custom macro design at transistor level along with… more
- NVIDIA (Santa Clara, CA)
- …how you can make a lasting impact on the world! We are currently looking for a Senior Methodology Engineer to develop and support our CAD tooling in our ... equivalent experience + 6+ years of experience in VLSI CAD flows and methodology + Timing closure and STA tool experience required + Good programming skills in… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) to join our ... for chip floorplan, power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis and back-end verification across… more
- NVIDIA (Santa Clara, CA)
- …are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software ... understanding of ASIC design flow including RTL design, verification, logic synthesis, timing analysis and bringup. + Strong interpersonal skills and an excellent… more
- NVIDIA (Santa Clara, CA)
- …floorplanning and chip assembly, power and clock distribution, power and area optimization, timing , IR and EM analysis and closure + Work with internal and external ... partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all...methods and techniques + Strong background in STA, extraction, timing and RC correlation + Good understanding of design… more
- NVIDIA (Santa Clara, CA)
- …complex challenges across diverse industries. NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is ... equivalent. + Strong fundamentals in digital design, system and microarchitecture, timing , clocking, power, noise, and control systems; Deep understanding of… more
- NVIDIA (Santa Clara, CA)
- …+ Deep understanding of logic optimization techniques and relative area, timing , and power trade-offs + Strong understanding of physical design implementation ... eg: physical synthesis, placement, routing, logic restructuring, etc. + Should be a power user of synthesis and/or place and route EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Good debugging and problem-solving skills + Strong interpersonal… more
- Hawaiian Electric (Honolulu, HI)
- Wildfire Mitigation Planning Engineer / Senior Wildfire Mitigation Planning Engineer - Oahu Date:Nov 25, 2025 Location: Honolulu, Hawaii (HI), US, 96813 ... seeks to fill at either the Wildfire Mitigation Planning Engineer or Senior Wildfire Mitigation Planning ...on the ongoing development of the WSS. + Develops methodology to apply risk-informed analysis to ensure cost-effective risk… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a sufficient ... from concept to first customer shipments. **Your Impact** You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing … more
- Cisco (Maynard, MA)
- …working in a smaller ASIC team can provide. Your Impact As a Physical Design Engineer , you will play a key role in the full RTL-to-GDSII implementation flow for ... advanced semiconductor nodes. You will optimize floor planning and timing , analyze and improve backend design flows, and collaborate across teams to ensure the… more
- RTX Corporation (Cedar Rapids, IA)
- …position is for a highly experienced, highly motivated Electrical or Computer Engineer that will be involved in the design, implementation, verification and ... of high-performance ASICs, FPGAs, and SoPCs for Collins Avionics solutions. As an engineer in this organization, you will be employing best practice design and… more
- CIRCOR International, Inc. (Monroe, NC)
- POSITION DETAILS - Sr Manufacturing Engineer Position Summary The Senior Manufacturing Engineer position works collectively with other functional groups ... Work on continuous improvement projects that support the Lean Manufacturing methodology such as set-up reduction and Kaizen events. Principal Activities +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... SI models using data from lab measurements and/or modelling tool/ methodology updates. + Substrate and board layout SI guidelines...such as Ansys2D. + Familiarity with a system level timing or loss budget including silicon, package and board… more
