• SoC DFT Engineer , Google…

    Google (Sunnyvale, CA)
    SoC DFT Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... on TPU architecture and its integration within AI/ML-driven systems. As a DFT Engineer you will be responsible for defining, implementing and deploying advanced… more
    Google (11/25/25)
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  • ASIC/ SOC DFT Engineer

    SpaceX (Sunnyvale, CA)
    ASIC/ SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... this possible, with the ultimate goal of enabling human life on Mars. ASIC/ SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
    SpaceX (09/18/25)
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  • Sr. DFT Design Engineer , AWS…

    Amazon (Austin, TX)
    …Qualifications - BS degree in EE, CE, or CS - 5+ years of practical DFT experience with large processor and/or SoC designs - Knowledge about industry standard ... * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block designers to integrate...) architectures * Work with block designers to integrate DFT implementations * Work with physical design team to… more
    Amazon (09/25/25)
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  • Senior DFT Static Timing Analysis…

    Google (Sunnyvale, CA)
    Senior DFT Static Timing Analysis Engineer , Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... timing analysis and timing ECO creation, timing margins). + Experience in DFT architectures and associated test methodologies. + Experience in Tessent generated … more
    Google (12/05/25)
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  • Senior Staff DFT Engineer

    Renesas (Austin, TX)
    Senior Staff DFT Engineer Job Description **About the team:** As part of Renesas's Infrastructure Power Business, you will contribute to the development of our ... computing in the datacenter. **What we need:** We are seeking a Mixed-Signal DFT Engineer to ensure efficient, high-coverage, testability for analog and… more
    Renesas (11/22/25)
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  • Senior Principal DFT Design Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …on the world of technology. We are looking for SoC /ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and ... preferred. + Prior 5-15 years of professional experience in SoC /ASIC Digital Design with focus on Design for Test.../ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT more
    Cadence Design Systems, Inc. (12/05/25)
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  • Design Automation DFT Engineer

    Broadcom (Fort Collins, CO)
    …a Design Automation Software Development Engineer in the Design For Test ( DFT ) team developing SoC ASIC products. They will define, develop, deploy and ... have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** DFT Design Automation Engineer ** Broadcom's ASIC Products Division is seeking… more
    Broadcom (11/20/25)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build cutting-edge GPUs ... power everything from AI to gaming! As a Senior SOC Design Engineer , you'll work at the...in ASIC design, Physical design, CAD, Package Design, Software, DFT , and more. Our ASICs pack hundreds of billions… more
    NVIDIA (12/10/25)
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  • SoC Physical Design Engineer

    Google (Sunnyvale, CA)
    SoC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more junior ... within AI/ML-driven systems. As a System on a Chip ( SoC ) Physical Design Engineer , you will collaborate...will collaborate with Register-Transfer Level (RTL), Design for Testing ( DFT ), Floorplan, and full-chip Sign off teams. Additionally, you… more
    Google (12/11/25)
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  • Hardware Application Engineer - SoC

    NVIDIA (Santa Clara, CA)
    We are seeking a skilled Hardware Application Engineer to provide complete SoC product and platform support across the full hardware lifecycle. In this role, you ... and complex design challenges. + Support product design reviews-offering recommendations, DFM/ DFT improvements, and risk mitigation strategies to OEM partners. +… more
    NVIDIA (12/12/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    …a critical role in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation SoC products. You'll help drive ... We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over...teams. + Own the architecture, design, and verification of DFT IPs for cutting-edge SoC designs. +… more
    NVIDIA (10/25/25)
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  • Test Design Hardware Developer

    IBM (Poughkeepsie, NY)
    …to delivering testable, high-performance silicon in innovative ways. We're looking for a DFT Engineer who values teamwork and brings hands-on experience with ... team. **Your role and responsibilities** As a Test Design Engineer , you will be responsible for architecting and implementing..., you will be responsible for architecting and implementing DFT strategies for complex SoC designs using… more
    IBM (10/29/25)
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  • Senior Engineer , Front End Computer Aided…

    Microsoft Corporation (Mountain View, CA)
    …checks across front-end areas like RTL & VIP Design, Design Verification, Validation, DFT , Emulation, Design Synthesis, RTL Power Anaysis, PD Handoff and SoC ... can deliver cutting-edge silicon solutions for Microsoft. As a Senior Front-End CAD Engineer , you'll drive the development and adoption of cutting-edge SoC and… more
    Microsoft Corporation (12/03/25)
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  • CPU Design Methodology Engineer

    NVIDIA (Hillsboro, OR)
    …responsible to our environment. The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build ... We are now looking for a CPU Design Methodology Engineer ! The complexity of chip development has greatly increased...passionate about developing methodologies and automation solutions that enable SOC creation in the most optimized way. In this… more
    NVIDIA (11/20/25)
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  • ASIC Design Engineer , Amazon Leo

    Amazon (Austin, TX)
    …role you will: . Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets. . Define, ... configure and integration SoC Subsystems . Contribute to the SoC .... Understand low power design & the impact of DFT on the blocks . Perform initial synthesis &… more
    Amazon (12/10/25)
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  • Test Engineer (ATE)

    Broadcom (San Jose, CA)
    …before you apply.** **Job Description:** Broadcom is seeking a highly motivated **Test Engineer ** to join our Semiconductor Test Engineering team. In this role, you ... analyze results to drive yield and performance improvements. + Work with ** DFT , design, and product engineering teams** to define test requirements, improve test… more
    Broadcom (12/11/25)
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  • ASIC Engineer , Implementation

    Meta (Sunnyvale, CA)
    …to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced optimization ... work w/ designers to create waivers. 6. Perform RTL DFT analysis and improve DFT coverage for...for RTL-synthesis and PrimeTime-STA for blocks and top-level including SOC . 11. Analyze inter-block timing and create IO budgets… more
    Meta (09/20/25)
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  • Senior ASIC Design Engineer - Hardware

    NVIDIA (Austin, TX)
    Join the NVIDIA System-On-Chip ( SOC ) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering ... we need to see: + BS or equivalent experience in Electrical Engineering, Computer Engineer , or related degree required, advanced degrees (MS, PhD) a plus + 3+ years… more
    NVIDIA (11/21/25)
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  • Physical Design Engineer II (Silicon…

    SpaceX (Irvine, CA)
    …make this possible, with the ultimate goal of enabling human life on Mars. SOC /ASIC PHYSICAL DESIGN ENGINEER II (SILICON ENGINEERING) At SpaceX we're leveraging ... Physical Design Engineer II (Silicon Engineering) Irvine, CA Apply SpaceX...analog circuit and physical design + Basic knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
    SpaceX (12/09/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... verification/physical design team to deliver a world-class solution. NVIDIA SOC Interconnects are among the industry's most sophisticated because of… more
    NVIDIA (12/13/25)
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