• Sr . SOC/ ASIC Timing Signoff…

    SpaceX (Irvine, CA)
    Sr . SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... the ultimate goal of enabling human life on Mars. SR . SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION...rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest… more
    SpaceX (08/24/24)
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  • Sr . SOC/ ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    Sr . SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)...rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest… more
    SpaceX (11/15/24)
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  • Sr . ASIC Design Verification…

    SpaceX (Irvine, CA)
    Sr . ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)...rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest… more
    SpaceX (10/17/24)
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  • Sr . ASIC Digital Design Engineer…

    Micron Technology, Inc. (Minneapolis, MN)
    …your individual and collaborative skills in this exciting and outstanding opportunity. As a Sr . Digital Design Engineer in Micron's ASIC logic design team, you ... Micron Technology, Inc. has redefined innovation with the world's most advanced memory and semiconductor technologies. We're an international team of visionaries… more
    Micron Technology, Inc. (08/30/24)
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  • Sr . Manager, SOC ASIC , Project…

    Amazon (Austin, TX)
    …and manage the Austin Design Center responsible for defining, implementation (SOC / RTL / IP), and bring-up of Project Kuiper's next generation custom SOC chips ... is responsible for designing SOC architecture and SOC / RTL implementation for primary baseband modem, local networking, compute...systems being developed in house on top of the ASIC solutions built by this team. Job responsibilities In… more
    Amazon (10/25/24)
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  • Sr . ASIC Design Verification…

    Qualcomm (Santa Clara, CA)
    …controller, Coherent Interconnects, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion ... field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred...5+ years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL.… more
    Qualcomm (10/14/24)
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  • Sr Principal Electrical Engineer FPGA/…

    Northrop Grumman (Dulles, VA)
    …will join the Electrical Engineering Avionics department that specializes in FPGA/ ASIC for space applications. **Basic Qualifications: Sr . Principal Digital ... history, they're making history. We have openings for a **FPGA/ ASIC Engineer** to join our team of qualified, diverse...with a PhD + Experience with VHDL design or Advanced /verification ​for FPGA's + Must have hands on… more
    Northrop Grumman (10/31/24)
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  • Senior Electrical Engineer - ASIC

    RTX Corporation (Cedar Rapids, IA)
    …up for the challenge? Join our mission today. Senior Electrical Engineer - ASIC /FPGA - Advanced Technology (Onsite) This position is for a motivated ... ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend...and languages (eg constrained random, functional coverage, SystemVerilog) + ASIC / FPGA lab validation with advanced more
    RTX Corporation (08/27/24)
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  • Hardware Engineering Manager - RTL Design…

    BAE Systems (Manchester, NH)
    …leading DV engineers within multi-disciplined engineering teams through all phases of an ASIC or FPGA development lifecycle is important, as the individual will be ... execution and mentor engineers. Our employees work on the world s most advanced electronics from detecting threats for F-35 pilots to illuminating the night for… more
    BAE Systems (09/11/24)
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  • Senior ASIC Design Engineer - Memory…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... opportunity to be responsible for the micro-architecture and design including RTL design, synthesis, functional verification and timing analysis using groundbreaking… more
    NVIDIA (11/13/24)
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  • ASIC Digital Design Engineer - WiFi MAC

    Qualcomm (San Jose, CA)
    …(eg, Director level and above). **Principal Duties & Responsibilities:** * Leverages advanced ASIC knowledge and experience to define, model, design, optimize, ... help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and… more
    Qualcomm (09/23/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Westford, MA)
    …Gaming, and Entertainment solutions. Tasks will include micro-architectural definition, RTL coding, logic debug, timing closure, power optimization and verification ... PL and DL + implementing readable, high-performance, area and power efficient RTL to achieve design targets, including upcoming performance, adaptability, and safety… more
    NVIDIA (11/15/24)
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  • Sr . Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …ARM IP/Coresight based debug design **Principal Duties and Responsibilities:** * Leverages advanced ASIC knowledge and experience to define, model, design ... candidate will work hands-on and own their design through the full ASIC development process from specification, RTL implementation, verification, synthesis,… more
    Qualcomm (10/10/24)
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  • Sr . DDR IP Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr . DDR IP Design Engineer (Silicon Engineering) at...rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest… more
    SpaceX (10/21/24)
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  • Sr . Physical Synthesis Implementation…

    Qualcomm (San Diego, CA)
    …to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, ... subsystem running the physical synthesis with Synopsys Fusion Compiler. + Work with RTL designers on managing complex power intent + Manage timing constraints +… more
    Qualcomm (10/04/24)
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  • Sr Specialist, Electrical Engineering

    L3Harris (Rochester, NY)
    …embedded communication systems + Experience with Mentor Graphics Verification tools + FPGA/ ASIC RTL Design experience + Proficiency in Object Oriented ... Job Title: Sr Specialist, Electrical Engrg Job Code: 16728 Job...10 years of prior relevant experience developing and verifying FPGA/ ASIC based embedded system solutions. Preferred Additional Skills: +… more
    L3Harris (10/07/24)
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  • Sr . Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and ... design methodologies (RTL2GDS) and CAD flows for ML Accelerator chips in advanced nodes Drive improvement in RTL2GDS flows/methodology for PPA and TAT improvements… more
    Amazon (10/18/24)
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  • Principal Digital Verification Engineer/…

    Northrop Grumman (Linthicum, MD)
    …verification methods, tools and techniques. + Perform functional verification of register transfer level ( RTL ) code of a complex ASIC at block level and SOC ... UVM + Experience developing testplans, participating in reviews, test development and RTL debug ** Senior Principal Engineer Basic Qualifications:** + Bachelor's… more
    Northrop Grumman (11/15/24)
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  • Senior Verification Engineer - DRAM Design

    Micron Technology, Inc. (Atlanta, GA)
    …and mentoring junior engineers would be a stong plus + Understanding of industry ASIC design & flow which includes RTL design, logic and timing synthesis, ... Familiarity with the DRAM DFT flow and DFT verification. + Good understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing… more
    Micron Technology, Inc. (09/19/24)
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  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …(eg, Director level and above). **Principal Duties & Responsibilities:** * Leverages advanced ASIC knowledge and experience to define, model, design (digital ... Working with the WiFi algorithm and systems team to design and test advanced WiFi functionalities such as OFDM and OFDMA modulators and demodulators, transmit… more
    Qualcomm (09/25/24)
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