- SpaceX (Redmond, WA)
- Sr . SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC/ ASIC PHYSICAL DESIGN...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $160,000.00 -… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. ... inventiveness and intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in class PPA for high-performance designs, eg… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and … more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place… more
- Google (Mountain View, CA)
- …chip design tools. Minimum Qualifications: + At least 10 years experience in ASIC physical design flows and methodologies in advanced nodes. + Experience ... in a research environment. + Hands on experience and a solid understanding of ASIC physical design , physical design flows and methodologies including… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from -… more
- Amazon (Redmond, WA)
- …Engineering. * 10+ years of experience in ASIC implementation. * Experience in leading physical design . * Strong exposure to UPF flow for low power design ... you will set up the flow for both logic and physical synthesis flow for various technology nodes. * Work with the ASIC design and DFT teams to understand the… more
- NVIDIA (Santa Clara, CA)
- …opportunity to build sophisticated GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design , CAD, Package Design , Software, DFT ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design...design quality checks and reviews to present the physical design team with high-quality RTL What… more
- SpaceX (Irvine, CA)
- Sr . ASIC Design Engineer...and learning new skills COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $160,000.00 - ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER (SILICON...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- SpaceX (Irvine, CA)
- Sr . ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN VERIFICATION ENGINEER...changing needs and requirements COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $160,000.00 - $220,000.00/per… more
- Amazon (San Diego, CA)
- …of Silicon development from architecture definition, RTL design , Verification, IP design , Physical design , silicon bring up, test, characterization, ... connectivity. The Project Kuiper team is looking for a Sr . Technical Program Manager with experience in ASIC...ASIC /SOC leads) to create project execution plans for ASIC /SOC development considering all criteria to design … more
- SpaceX (Irvine, CA)
- Sr . SOC/ ASIC Timing Signoff & Front-End...and timing closure + Work closely with chip architecture, design verification, physical design , DFT, ... the ultimate goal of enabling human life on Mars. SR . SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION...+ Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. +… more
- Honeywell (Plymouth, MN)
- …experience WE VALUE + Degree in Electrical Engineering + General experience in ASIC concepts and design + Experience working in multi-disciplinary teams + ... + Lead efforts to map customer designs into Honeywell's ASIC technology + Timing constraints + Simulation + Conduct...Background in BIST, Design For Test (DFT), physical synthesis, static… more
- The Boeing Company (Tukwila, WA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for an ** ASIC and/or FPGA Design and Verification Engineer** (Experienced, Lead or Senior ) to join us as part… more
- NVIDIA (Santa Clara, CA)
- …languages, such as: Perl, Python and Make etc. + A working understanding of floor-planning, ASIC physical design , VLSI and DFT. + A hands on technical ... Memory Security and System Configuration: NVIDIA is seeking a Senior Hardware Security Architect to architect, design ,...a Senior Hardware Security Architect to architect, design , validate, and guide implementation of HW security for… more
- Cisco (San Jose, CA)
- …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of simulation… more
- Cisco (San Jose, CA)
- …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... * Bachelor's degree in Electrical or Computer engineering and 12+ years of ASIC Design experience. * Verilog/System Verilog programming experience. * Interactive… more
- Cisco (San Jose, CA)
- …to address design bugs and close code coverage. * Work closely with the physical design team to close design timing and place-and-route issues. * Triage, ... Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering with 4+… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- Palo Alto Networks (Santa Clara, CA)
- …You will collaborate closely with the ASIC vendor and the PANW ASIC design team in floorplanning, closing timing, validating constraints, and optimizing ... RAMs, CAMs, custom IPs, and IO pads throughout the design hierarchy + Collaborate with external ASIC ...+ RTL quality checks: Lint, CDC, RDC, X-verification + Physical design for networking ASICs with wide… more