- Qualcomm (San Diego, CA)
- …+ Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Synopsys Fusion Compiler. + Work with RTL ... track, and foresee and plan around obstacles. + Proficient in running Physical synthesis with Synopsys Fusion Compiler on SoC Top Level blocks with complex… more
- SpaceX (Irvine, CA)
- …for test modes + Timing closure ownership throughout the entire project cycle (RTL, synthesis , and physical implementation ) + Analysis of clock domain ... Sr . SOC/ASIC Timing Signoff & Front-End Implementation...timing validation flows + Execute low power design and physical synthesis , deploying knowledge of unified power… more
- NVIDIA (Santa Clara, CA)
- …Nvidia's CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis , physical implementation , and timing closure by understanding ... physical design and implementation . + Hands-on experience in physical synthesis , floor planning, P&R, and timing closure of high-performance designs with… more
- SpaceX (Sunnyvale, CA)
- …the performance and capabilities of the Starlink network. RESPONSIBILITIES: + Perform partition synthesis and physical implementation steps (eg synthesis ... Sr . SOC/ASIC Physical Design Engineer (Silicon...physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC design… more
- Amazon (Portland, OR)
- … design closure at the block and Sub System level. - Drive block physical implementation through synthesis , formal verification, floor planning, bus / ... latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to...edge. Work hard. Have fun. Make history. As a Senior Physical Design Engineer, you will: -… more
- Micron Technology, Inc. (Minneapolis, MN)
- …with FEOL and BEOL teams from Design Verification, Analog Design, and Modeling to Synthesis and Physical Implementation . + Participate in advanced packaging ... individual and collaborative skills in this exciting and outstanding opportunity. As a Sr . Digital Design Engineer in Micron's ASIC logic design team, you will be… more
- Amazon (Cupertino, CA)
- …power-performance-area tradeoffs for physical design closure - Drive IO/Core block physical implementation through synthesis , floor planning, bus / pin ... physical domain. - Thorough knowledge of device physics, custom/semi-custom implementation techniques - Experience solving physical design challenges across… more
- Capgemini (Santa Clara, CA)
- … and STA Engineer who will be responsible to prepare SDC and run physical synthesis using Synopsys Fusion compiler for TSMC technology nodes below 5nm ... Synthesis and STA experience. + Proficient in physical synthesis flow + Must have driven...POCV for timing variations. + Strong debugging capabilities with Synthesis , timing analysis and implementation + Proficient… more
- NVIDIA (Santa Clara, CA)
- …(DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis , placement, routing, logic ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …software engineering methodologies + Build flows for methodologies incorporating logic/ physical synthesis , design planning, equivalence checking for ... one of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track record developing… more
- Abbott (Alameda, CA)
- …This position is responsible for participating in the planning and development/ synthesis of sensor algorithm for new product launches and on-market products. ... Lastly, they will develop working relationships with cross functional groups and senior /executive management. This is a fully on-site role in Alameda, CA. **What… more
- Siemens Digital Industries Software (Fremont, CA)
- …chip, board, and system design. **Job Summary:** We are seeking an experienced Senior R&D manager to focus on the development of Siemens' Inverse Lithography Tooling ... (ILT) and mask synthesis flows and solutions for patterning processes. This role...and R&D, with roles ranging from Staff Engineer to Senior Staff R&D Engineer. + **Technical Skills:** Proficiency in… more
- Amazon (Sunnyvale, CA)
- …As the implementation lead you will set up the flow for both logic and physical synthesis flow for various technology nodes. * Work with the ASIC design and ... equivalent experience. * 7+ years of experience in ASIC implementation , ie, synthesis , STA and working with...leading or solely developing the methodology and scripts for physical synthesis . * Proven track record in… more
- NVIDIA (Santa Clara, CA)
- …of CPU on-chip interconnect network and last-level caches , working closely with the physical design team on implementation , synthesis and timing closure as ... experience in processor or other related high-performance semiconductor designs. + Physical design expertise including hands-on synthesis experience and in-depth… more
- Amazon (San Diego, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on behalf of our customers. ... back-end design such as Clocking, Power Delivery and Partition synthesis /APR. - Drive physical design and timing...CS - 10+ years or more of practical semiconductor implementation experience - Scripting experience with Perl, Python, tcl,… more
- SpaceX (Redmond, WA)
- Sr . DDR IP Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... make this possible, with the ultimate goal of enabling human life on Mars. SR . DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Amazon (San Diego, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr . SOC Design Engineer-STA to continue to innovate on behalf of our customers. We are ... - Includes definition and development of signoff methodology and corresponding implementation solution - Flow for STA, Crosstalk Delay and Crosstalk Noise… more
- Siemens (Wilsonville, OR)
- …IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design/Verification, LEC, STA ... chip, board and system design. **Job Overview** Siemens EDA is seeking a senior level, self-starting, motivated, and high performing individual for an opportunity to… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs...including clock domain crossing checks and MTBF analysis, logic synthesis , netlist quality checks, etc. + Help in all… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... frequencies about 1 GHz + Experience with low power implementation and signoff, power gating, multiple voltage rails, UPF...- Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level +… more