• Sr . Synthesis & Front

    SpaceX (Sunnyvale, CA)
    Sr . Synthesis & Front - End STA...COMPENSATION & BENEFITS: Pay range: Synthesis and Front - End STA Engineer/ Senior : $170,000.00 - ... ultimate goal of enabling human life on Mars. SR . SOC/ASIC SYNTHESIS & FRONT - END STA ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (05/09/24)
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  • Senior Synthesis Flow Development…

    NVIDIA (Santa Clara, CA)
    …diverse team creating NVIDIA's chip design methodology! We're responsible for the Front - End Design Implementation methodology for all of NVIDIA's semiconductor ... engineering methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs… more
    NVIDIA (05/29/24)
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  • Sr . ASIC Design Engineer, Blink/Ring ASIC…

    Amazon (Sunnyvale, CA)
    …to deliver high quality RTL -Ensure quality by running and tracking results of front - end tools including: Synthesis , Lint (RTL, DFT, UPF), Power Analysis ... and STA -Take the lead and work with verification teams to define functional coverage -Work with pre-silicon verification teams to assist in defining testplans/testbenches -Work with post-silicon validation teams to define and execute on testplans -Write high… more
    Amazon (06/25/24)
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  • Sr . Physical Design Engineer - Full Chip,…

    Amazon (San Diego, CA)
    …with Perl, Python, tcl, shell and drive to automate flows - Proficiency in chip front - end and back- end implementation tools such as Fusion compiler, Design ... latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on...between the FC Design team and other functions within back- end design such as Clocking, Power Delivery and Partition… more
    Amazon (06/22/24)
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  • Sr . SOC Design Engineer - STA, Hardware…

    Amazon (Sunnyvale, CA)
    …with Perl, Python, tcl, shell and drive to automate flows - Proficiency in chip front - end and back- end implementation tools such as Fusion compiler, Design ... latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on...Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis , Place & Route and other local/remote teams to… more
    Amazon (05/28/24)
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  • Sr . Analog/Mixed Signal Design Engineer

    Skyworks (San Jose, CA)
    …will be participating in developing cutting-edge, state-of-the-art PA, RF switches, LNAs and front - end modules for Automotive and IoT applications to enable the ... Sr . Analog/Mixed Signal Design Engineer Apply now "...op-amps, power detectors, regulators, precision current sources, basic logic synthesis . + Exposure to best analog layout practices in… more
    Skyworks (06/10/24)
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  • Sr . Digital Design Engineer

    Integense (San Jose, CA)
    …products in reliable mass production. + Experienced in all Front and Back End activities - RTL, Verification, Synthesis , STA, DFT, ATPG, etc. + Adept with ... our customers. We are expanding and looking for a Senior / Principal Member of Technical Staff, Digital Design....the digital design for multiple Battery Management products, full Front End and Back End more
    Integense (06/26/24)
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  • Senior Principal IC (RTL to GDSII) Design…

    Cadence Design Systems, Inc. (Austin, TX)
    …new technologies are essential for success in the position * Assist customers with adopting Cadence Front End tools in Synthesis with Genus DFT & Scan with ... Implementation Platform * Manage strategic customer evaluations/benchmarks on Cadence's front - end solutions to establish technology differentiation and assert… more
    Cadence Design Systems, Inc. (04/27/24)
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  • Senior CPU Implementation Methodology…

    NVIDIA (Santa Clara, CA)
    …be doing: + You will be responsible for all aspects of front - end design implementation methodologies ( synthesis , formal-equivalence-checking), flow ... We are looking for a Senior CPU Implementation Methodology Engineer to join our...power trade-offs + Should be a power user of synthesis and/or place and route EDA tools from Synopsys… more
    NVIDIA (06/15/24)
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  • Senior CAD Flow Development Engineer

    NVIDIA (Santa Clara, CA)
    …diverse team crafting NVIDIA's chip design methodology! We're responsible for NVIDIA's front - end ASIC software including RTL synthesis , equivalence checking, ... architect highly automated and customizable design software incorporating logic/physical synthesis , design planning, and equivalence checking for industry-leading chip… more
    NVIDIA (05/21/24)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …& Area (PPA) optimization + Contribute to timing closure through full product cycle ( front end , back- end , tapeout) Requirements: + BS/MS or Ph.D. in ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...Engineering with a minimum of five years of CPU/GPU/ASIC front - end design + Proficiency in SystemC, SystemVerilog,… more
    quadric.io, Inc (05/07/24)
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  • Senior DevOps Engineer - Partial Telework

    GliaCell Technologies (Annapolis Junction, MD)
    Are you a Senior DevOps Engineer who is ready for a...needed. + Will work across contracts to assist both front - end and back- end development and ... to work with some amazingly talented people Job Description: GliaCell is seeking a Senior DevOps Engineer on one of our subcontracts. This is a full-time position… more
    GliaCell Technologies (05/07/24)
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  • Senior Principal Digital Engineer (FPGA…

    Northrop Grumman (Baltimore, MD)
    …+ Active DoD Top Secret Clearance or higher + Experience with industry standard ASIC front - end design tools for synthesis , LEC, CDC + Experience with STA ... undersea to space and cyberspace. NGMS is seeking a Senior Principal Engineer with the desire to learn new...designs on cutting edge products and systems. As a Senior Principal Digital Engineer at Northrop Grumman you will… more
    Northrop Grumman (06/28/24)
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  • Senior Silicon Engineer - IO

    Microsoft Corporation (Santa Clara, CA)
    …is seeking a Senior Silicon Engineer - IO. You will join our front - end silicon team and be responsible for delivering cutting-edge, high performance, low ... all employees to positively impact our culture every day. **Responsibilities** As a Senior Silicon Engineer-IO in the Data Processing Unit team you will be… more
    Microsoft Corporation (06/25/24)
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  • Senior Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    …is seeking a Senior Silicon Silicon Engineer. You will join our front - end silicon team and be responsible for delivering cutting-edge, high performance, low ... power, scalable and programmable DPU silicon. **Responsibilities** + As a Senior Silicon Engineer in the Data Processing Unit team you will be validating silicon to… more
    Microsoft Corporation (04/11/24)
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  • Senior (Mil-Aero) RTL Design - Architect

    Cadence Design Systems, Inc. (Austin, TX)
    …Qualifications: USA-Citizenship required, Green Card will be considered. 10+ years of Front End design and/or verification.with a BS/MS Engineering or Computer ... RTL design (Verilog), simulators debuggers Hands on Experience in Synthesis , SDC creation and support PD and STA teams....good communication and design management skills Experience with Cadence front end toolset #LI-MA1 We're doing work… more
    Cadence Design Systems, Inc. (06/18/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …and scalable manner + Identify inefficiencies and improvement opportunities in the front - end chip implementation process and propose ideas to tackle them ... + Own front - end design quality checks and reviews to...across functional teams to build consensus. + Experience in synthesis , padring, and physical design is a plus. The… more
    NVIDIA (05/10/24)
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  • Senior Research Engineer I

    University of Southern California (Arlington, VA)
    …Group (RCG) at ISI is a leader in disrupting and advancing the fields of front - end ASIC and FPGA design, reconfigurable architectures, and EDA tools. As an ... Senior Research Engineer IApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Arlington-VA/ Senior -Research-Engineer-I\_REQ20140783/apply) Viterbi… more
    University of Southern California (04/30/24)
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  • RTL Senior Principal Digital Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …learn and improve existing digital flows. The candidate will primarily be responsible for front - end coding, scripting and developing flows at all phases of the ... experience as well as a thorough understanding of the end -to- end digital design flow in order to...Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development… more
    Cadence Design Systems, Inc. (05/31/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …responsible for crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, ... interacts with the floor-planning and back end teams to help craft the physical floorplan of...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in Perl or other… more
    NVIDIA (05/10/24)
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