- Cisco (San Jose, CA)
- …goals, and love to win as a team. Your Impact You are a detail-oriented Timing Constraint (SDC) Engineer with strong analytical skills and a deep ... understanding of timing constraints, including clock groups, exceptions, and clock exclusivity....scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate… more
- SpaceX (Irvine, CA)
- …ECOs for complex blocks + Deploy and enhance methodology and flows related to timing constraint generation and verification and timing closure + Work ... Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer ...PREFERRED SKILLS AND EXPERIENCE: + Experience in ASIC multimode constraint generation, constraint partitioning and timing… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the ... in coding- TCL, Python. Must have hands-on experience with NanoTime static timing analysis, its algorithms and associated circuit constraint checks. Should… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Custom Circuits Timing Methodology Engineer to help drive sign-off strategies for the ... TCL, Python. Must have hands-on experience with NanoTime static timing analysis, its algorithms and associated circuit constraint... timing analysis, its algorithms and associated circuit constraint checks. Ways to Stand Out From the Crowd:… more
- Broadcom (San Jose, CA)
- …debugging, and coverage closure + Collaborate with physical design team on constraint generation, timing closure analysis, formal verification, low power checks ... design and validation techniques including UPF/CPF Must be familiar with design constraint generation, logic synthesis, timing closure analysis and Clock/Reset… more
- RTX Corporation (Cedar Rapids, IA)
- …connected and protected when it matters most. We are seeking a Principal Electrical Engineer to lead the design and development of complex digital hardware used in ... Ethernet, I2C, SPI, and UART. Generate Printed Wiring Board (PWB) layout constraint guidelines and oversee the routing, layout, fabrication, and assembly of complex… more
- L3Harris (Wilmington, MA)
- Job Title: Lead, FPGA Digital Design Engineer Job Code: 14038 Job Location : Wilmington, MA Relocation: Relocation assistance is available to qualified applicants ... defense, intelligence, and commercial applications . Essential Functions: The Lead FPGA Engineer will perform the following: + Support proposal efforts in the… more
- L3Harris (Palm Bay, FL)
- … Constraint driven FPGA Synthesis, place and route, static timing analysis + Verify FPGA Designs: Testbench development, scripting, VHDL simulation ... Job Title: Specialist, FPGA Design Engineer Job Code: Job Location: Palm Bay, FL...verify designs + Experience in building FPGAs with difficult timing and/or difficult routing constraints Preferred Additional Skills: +… more
- Leonardo DRS, Inc. (Beavercreek, OH)
- …Route, Timing analysis, Verification, and Integration activities. Generate and execute constraint driven synthesis and timing closure techniques. + Lead the ... around the world. **Job Summary** We are seeking a skilled Principal Electrical Engineer with experience in Digital Logic and Firmware development to lead technology… more
- onsemi (Richardson, TX)
- …pads, quiet power/ground supplies, and custom analog routes + Static Timing Analysis related activities ( constraint development, parasitic extraction, sign-off ... Technical Staff Physical Design / PnR (Place and Route) Engineer , you will design custom ASSPs and ASICs with...Technical Staff Physical Design / PnR (Place and Route) Engineer , you are responsible for Physical Design tasks at… more
- L3Harris (San Diego, CA)
- Job Title: Lead, FPGA Design Engineer - Technical Lead (Secret Clearance) Job Code: 16055 Job Location: San Diego, CA Relocation: Relocation assistance is available ... domains with defense, intelligence, and commercial applications. As an FPGA design engineer , you will be directly involved in the design, integration, and test… more
- L3Harris (San Diego, CA)
- Job Title: Sr Specialist, FPGA Digital Design Engineer Job Code: 15561 Job Location: San Diego, CA Relocation: Relocation assistance is available to qualified ... domains with defense, intelligence, and commercial applications. As an FPGA design engineer , you will be directly involved in the design, integration, and test… more
- RTX Corporation (Cedar Rapids, IA)
- …connected and protected when it matters most. We are seeking an Electrical Engineer II to assume a key role within the Communication Products Engineering Department ... in Mission Systems. This Engineer will design and development of digital hardware used...+ Experience with generating Printed Wiring Board (PWB) layout constraint guidelines and overseeing the routing, layout, fabrication, and… more
- L3Harris (Palm Bay, FL)
- Job Title: FPGA Design Engineer , Technical Lead Job Code: 17284 Job Location: Palm Bay, FL Job Schedule: On-site, 9/80 schedule (Every other Friday off!) Relocation: ... domains with defense, intelligence, and commercial applications. As an FPGA design engineer , you will be directly involved in the design, integration, and test… more
- ManpowerGroup (Cedar Rapids, IA)
- …in providing cutting-edge solutions and services to customers worldwide. As a Hardware Engineer , you will play a crucial role in the development and testing of ... teams to ensure seamless integration and optimal performance. **Job Title: Hardware Engineer ** **Location: Cedar Rapids, IA** **Pay Range: $51 - $54** **What's the… more
- Leonardo DRS, Inc. (Frederick, MD)
- …Route, Timing analysis, Verification, and Integration activities. Generate and execute constraint driven synthesis and timing closure techniques. + May also ... be involved with design, build, and test of cutting-edge devices containing both digital and optical hardware. Contribute to digital hardware requirements analysis, definition, and management. Conduct functional analysis, performance analysis (eg signal… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding of fundamental physical ... design flows and stages + Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow. + Exhibit excellent communication skills and be self-motivated and well organized. + Experience with FPGA and/or emulation… more
- RTX Corporation (Aguadilla, PR)
- …Position Role Type: Hybrid Join Collins Aerospace as a Senior Electrical Design Engineer , where you will assume a key role within the Communication Products ... card designs. + Experience with generating Printed Wiring Board (PWB) layout constraint guidelines and overseeing the routing, layout, fabrication, and assembly of… more
- RTX Corporation (Cedar Rapids, IA)
- …and protected when it matters most. We are seeking a Senior Electrical Engineer to lead the design and development of advanced digital hardware for high-performance ... circuit card designs + Experience with generating Printed Wiring Board (PWB) layout constraint guidelines and overseeing the routing and layout of the circuit card… more
- Arrow Electronics (Cedar Rapids, IA)
- **Position:** Hardware Engineer Digital Design (eInfochips Inc) **Job Description:** **Location:** **Cedar Rapids, IA (Onsite)** **Experience: 8 + years** **What ... requirements capture, schematic capture, component selection, signal integrity analysis, simulations, timing analysis and thermal analysis. + Generate PCB layout … more