• Principal/ Senior Principal Digital ASIC

    Northrop Grumman (Jessup, MD)
    …reality and deliver remarkable new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of ... both are listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:**... design + Working knowledge of the front-end ASIC design flow from RTL more
    Northrop Grumman (12/05/25)
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  • Principal FPGA / Rtl Design

    Silvus Technologies (Irvine, CA)
    …to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering ... addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will...* Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee,… more
    Silvus Technologies (01/02/26)
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  • Principal FPGA / Rtl Design

    Silvus Technologies (Los Angeles, CA)
    …pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the ... projects aimed at addressing challenging real-world communication needs. This _Principal FPGA / RTL Design Engineer_ position is based at Silvus headquarters in… more
    Silvus Technologies (10/08/25)
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  • RTL Design Engineer

    Google (Mountain View, CA)
    RTL Design Engineer , Multimedia and...or COdec) or Machine Learning IP. + Experience with ASIC design methodologies for clock domain checks and ... progress, while working with multi-disciplined and multi-site teams in RTL design , verification, or architecture/micro-architecture planning. Information… more
    Google (11/20/25)
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  • ASIC Digital Design Engineer

    Teledyne (Goleta, CA)
    …the excitement of being on a team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer : Oversees definition, design , ... and documentation for ASIC development. Determines architecture design , logic design , and system simulation. Defines...diagrams. + Creating risk assessments and traceability matrices. + RTL Front-End Design + Behavioral modeling of… more
    Teledyne (11/21/25)
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  • Principal ASIC Design

    SpaceX (Redmond, WA)
    Principal ASIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. PRINCIPAL ASIC DESIGN ENGINEER (SILICON ENGINEERING)...or computer science + 10+ years of experience in RTL implementation and/or FPGA/ ASIC development PREFERRED SKILLS… more
    SpaceX (01/01/26)
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  • Sr. ASIC Design Engineer

    Amazon (Austin, TX)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... signal routing - As a key member of the ASIC design team, you will implement and...Engineering or a related field - 5+ years in RTL design for SOC - 5+ years… more
    Amazon (12/30/25)
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  • ASIC Design Engineer - New…

    NVIDIA (Santa Clara, CA)
    We are now looking for an ASIC Design Engineer ! NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. ... lasting impact on the world. Join NVIDIA as an ASIC Design Engineer , influencing product...protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL more
    NVIDIA (11/25/25)
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  • Sr. Specialist, Electrical Engineer

    L3Harris (Herndon, VA)
    …sea and cyber domains in the interest of national security. Job Title: Sr. Specialist ASIC /FPGA Senior Design Engineer Job Code: 30428 Job Location: Herndon, ... 100 countries. Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Senior Design Engineer ...requirements and develop detailed architecture. + Plan and execute design ( RTL AND/OR HLS (C++ to … more
    L3Harris (10/26/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for an ASIC Design Engineer . NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ... Computer Arithmetic, CMOS transistors and circuits is required. + Understanding of ASIC design flow including RTL design , verification, logic synthesis,… more
    NVIDIA (12/23/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis… more
    NVIDIA (12/09/25)
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  • ASIC /FPGA Design Engineer

    L3Harris (Camden, NJ)
    …air, land, sea and cyber domains in the interest of national security. Job Title: ASIC /FPGA Design Engineer (SMES) Job Code: 32295 Job Location: Camden, NJ ... Engineering Staff (SMES) will be part of the key ASIC /FPGA design team, responsible for the delivery...from system requirements and developing detailed architecture + Execute design ( RTL AND/OR HLS (C++ to … more
    L3Harris (12/20/25)
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  • RTL Design Engineer

    Arrow Electronics (Santa Clara, CA)
    **Position:** RTL Design Engineer (eInfochips) **Job Description:** **Role: RTL Design Engineer ** **Location: San Jose CA (Remote)** ... + Lead silicon bring-up activities, troubleshoot, and debug PCIe related issues. + ASIC Design and Development: + Design , implement, and verify ASIC more
    Arrow Electronics (12/30/25)
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  • RTL Design Engineer

    Google (Sunnyvale, CA)
    RTL Design Engineer , University Graduate,... and document one or more blocks of an ASIC , including functionality and timing. + Work closely with software ... specific focus on TPU architecture and its integration within AI/ML-driven systems. As an RTL Design Engineer , you will be part of a team developing ASICs to… more
    Google (12/18/25)
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  • Senior ASIC Physical Design

    Google (Sunnyvale, CA)
    Senior ASIC Physical Design Engineer _corporate_fare_...As an ASIC Physical Design Engineer , you will collaborate with RTL , Design ... or equivalent practical experience. + 7 years of experience with physical design (eg from RTL to GDSII, including key stages like floorplanning, place and route,… more
    Google (12/18/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior ASIC Design Engineer to join...high bandwidth data paths. + A deep understanding of ASIC design flows including RTL ... our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a...document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.… more
    NVIDIA (11/20/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... have the opportunity to be responsible for micro-architecture and design including RTL design , synthesis,...equivalent experience) + 3+ years of relevant and proven ASIC design experience and a background in… more
    NVIDIA (12/23/25)
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  • Senior ASIC Engineer - SDC

    Cisco (San Jose, CA)
    **Sr. ASIC Engineer ** The application window is expected...timing modes. + Option to also do block level RTL design or block or top-level IP integration. ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. +… more
    Cisco (12/03/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Austin, TX)
    Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering ... in Perl/Python or other industry-standard scripting languages + Experience in RTL design (Verilog), verification (SystemVerilog), System-On-Chip design more
    NVIDIA (11/21/25)
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  • Senior ASIC Physical Design

    Cisco (Maynard, MA)
    …that working in a smaller ASIC team can provide. Your Impact As a Physical Design Engineer , you will play a key role in the full RTL -to-GDSII ... high-performance networking chips. You will: * Own and drive RTL -to-GDSII implementation for advanced nodes (sub-7nm to 2nm) *...4+ years of related experience * Hands-on experience in ASIC physical design and implementation * Experience… more
    Cisco (12/21/25)
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