- NVIDIA (Santa Clara, CA)
- We are now seeking a Senior Datacenter Resiliency (RAS) Architect ! NVIDIA is a learning machine that constantly evolves by seeking exciting opportunities that ... level of our craft. NVIDIA is seeking a Resiliency Architect to support the development and validation of GPU...debug tests on Architecture models. Support test debug on RTL , emulation, and silicon. + Run simulations to analyze… more
- NVIDIA (Santa Clara, CA)
- A key part of NVIDIA's strength is to innovate how we architect and develop our GPU for the changing AI and accelerated workloads. We are constantly looking for ways ... our design, infrastructure and methodology. We are looking for a Principal System Architect with a wealth of experience in shaping and bringing to fruition… more
- Amazon (Arlington, VA)
- …Web Services (AWS) connectivity and is looking for help. AWS seeks a Senior FPGA Development Engineer with experience developing programmable logic on the most ... advanced FPGAs. They will help architect , develop, and integrate scalable FPGA systems in the...AWS work. 10012 Key job responsibilities - Develop custom RTL and integrate with third party libraries to build… more
- Cisco (Milpitas, CA)
- …features. **Your Impact** We are seeking a highly experienced and accomplished FPGA Senior Design Engineer to provide technical leadership and deep expertise in the ... Take ownership of complex FPGA sub-modules, from micro-architecture definition to RTL implementation using Verilog/SystemVerilog or VHDL. + Design & Architecture:… more
- L3Harris (Herndon, VA)
- …in the interest of national security. Job Title: Sr. Specialist ASIC/FPGA Senior Design Engineer Job Code: 30428 Job Location: Herndon, VA (on-site) Schedule: ... than 100 countries. Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Design Engineer will be part of the key ASIC/FPGA design team,… more
- L3Harris (Camden, NJ)
- …of $ 15,000 . Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA ... the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect , implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class… more