• Sr. SerDes Characterization and Validation…

    SpaceX (Irvine, CA)
    …environmental conditions specific to space applications + Work closely with the ASIC design team to add/improve testability and define various loopback ... will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this… more
    SpaceX (01/11/26)
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  • Senior Custom ASIC Engineering Lead

    Broadcom (Irvine, CA)
    …ASICs in almost all major segments of the Semiconductor industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer ... scripting languages **Following skills are nice to have:** + Exposure to SERDES communications protocols. + Logic design , chip architecture, microarchitecture,… more
    Broadcom (11/06/25)
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  • Senior Logic Design Manager…

    Teradyne (North Reading, MA)
    …closer look at the minimum criteria for the position. + Minimum of 10 years of FPGA/ ASIC design experience. + Minimum of 5 years of experience as an FPGA/ ASIC ... designing with the following: PCIe, DDR3/4, AXI, ethernet, SPI, SERDES + Experience using digital design quality tools eg LINT, CDC, LEC. + Experience with… more
    Teradyne (01/13/26)
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  • Senior Mask Design Engineer…

    NVIDIA (Santa Clara, CA)
    …you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! Someone who is excited to join a growing and ... Performing physical layout for mixed-signal functions like PLL's, high speed SerDes , Analog to Digital converters, ESD structures designs in state-of-the-art… more
    NVIDIA (01/10/26)
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  • Senior Mask Design Engineer…

    NVIDIA (Santa Clara, CA)
    … Engineer? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic ... Performing physical layout for mixed-signal functions like PLL's, high speed SerDes , Analog to Digital converters, ESD structures designs in groundbreaking… more
    NVIDIA (01/10/26)
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  • Senior Hardware System Design

    Broadcom (San Jose, CA)
    …production boards using cutting-edge Broadcom SOCs. We are seeking a highly motivated Hardware Design Engineer with a strong focus on system design to join our ... from concept to NPI production, with a specific emphasis on system design , including schematics and PCB layout, board bring-up, and customer support.… more
    Broadcom (11/04/25)
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  • Senior Technical Lead - Signal / Power…

    Cisco (San Jose, CA)
    …seeking a Senior Technical Lead, Signal/Power Integrity Engineer for the design and analysis of high-speed interconnects and power distribution networks. As a ... and post-route signal integrity analysis of both PCB and ASIC package designs. + Write signal integrity design...important. + Working experience with high-speed NRZ and PAM4 SerDes , as well as high-speed PCB/package development and PI… more
    Cisco (11/13/25)
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  • Senior Signal Integrity Engineer

    Cisco (San Jose, CA)
    …the Next Generations of Cisco Switch products, be a part of the definition and design of current and next generation ASIC , package, printed circuit board (PCB), ... ** Senior Signal Integrity Engineer** The application window is...and post-route signal integrity analysis of both PCB and ASIC package designs. + Write signal integrity design more
    Cisco (01/09/26)
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  • Sr. Full Chip Physical Design Engineer…

    SpaceX (Sunnyvale, CA)
    …will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this ... chip architects, ASIC engineers, package engineers and block level physical design engineers to drive, chip floorplan reviews and identify area, interconnect, IP… more
    SpaceX (01/11/26)
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  • Senior Signal Integrity Engineer, Platform

    Google (Sunnyvale, CA)
    Senior Signal Integrity Engineer, Platform _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring ... + Experience with the product development process for mass volume production design , with a focus on signal integrity, power integrity and lab validation.… more
    Google (01/13/26)
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  • Senior Hardware Signal & Power Integrity…

    Microsoft Corporation (Santa Clara, CA)
    …software and hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data streams. Thanks to ... its integrated design , this solution empowers teams to operate with increased...integrity simulations including AC and DC analysis. - Develop serdes channel simulation models and correlate to test structures.… more
    Microsoft Corporation (01/01/26)
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  • Senior Hardware Systems Engineer

    Cisco (San Jose, CA)
    …Data Centers worldwide. We are inventors in our field, using powerful technologies to design a new class of innovative routers supporting the Internet of the Future. ... capability to identify and solve hardware issues during the design and testing phases. You understand the importance of...the best quality and best power efficiency using groundbreaking Serdes technology at the highest bit rates possible. Your… more
    Cisco (01/10/26)
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  • Sr. Signal and Power Integrity Engineer,…

    SpaceX (Redmond, WA)
    …constellation and is providing fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the system - thousands of ... software, and antenna/RF engineering. Early in any given product's design cycle, your work will include everything from IP...systems with cutting edge (eg 10 to 112+ Gbps) SERDES , DSPs, retimers, and optoelectronics + High-speed and high-bandwidth… more
    SpaceX (01/11/26)
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  • Director, Hardware Engineering

    Cisco (San Jose, CA)
    …+ Multi-functional Collaboration: 1) Partner closely with silicon architecture, ASIC design , verification, software, reliability, manufacturing operations, and ... in Design for Test (DFT), scan/ATPG, analog/mixed-signal test, high-speed SERDES bring-up and validation, and defect and failure analysis. + Technical Guidance… more
    Cisco (12/02/25)
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  • Hardware Engineer - Signal and Power Integrity

    Cisco (Carlsbad, CA)
    …is seeking a Senior PCB and Signal/Power Integrity Engineer for the design and analysis of high-speed PCB/substrate and power distribution networks. As a member ... of the hardware design team, you will help develop the next generations...electrical and mechanical engineers, collaborating closely with system architects, ASIC engineers, package engineers, layout engineer and other SI/PI… more
    Cisco (01/08/26)
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  • Lead HW Post-Silicon Validation Engineer

    Cisco (San Jose, CA)
    …cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. Operating at the forefront of technology, we ... where professionalism meets impact **Your Impact:** We are seeking a Senior HW Post-Silicon Validation Engineer with deep expertise in lab-intensive **hardware**… more
    Cisco (01/07/26)
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  • Sr. Hardware Engineer - ML Acceleration, Annapurna…

    Amazon (Cupertino, CA)
    …hardware team, you will have the outstanding and meaningful opportunity to participate in the design and execution of all PCIe and Serdes topics, with the goal ... performance, power, area analysis and trade-offs - Experience with modern ASIC /FPGA design and verification tools - Experience with SOC bring-up and post-silicon… more
    Amazon (01/04/26)
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  • Digital Verification Engineer

    Broadcom (San Jose, CA)
    …please Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer. In this highly visible role ... you will be working on ASIC for data center connectivity applications. Qualifications include: +...Computer Engineering with 10+ years of experience in digital design verification + Hands on experience in SV UVM,… more
    Broadcom (11/11/25)
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