- Qualcomm (San Diego, CA)
- …future for all. As a Qualcomm CPU Engineer, you will lead CPU design efforts with a critical impact across industries. Qualcomm Engineers collaborate ... with cross-functional teams to design , verify, and implement multi-core CPU operations...Collaborate with teams to validate constraints, verification, STA, and physical design ; resolve issues independently. Lead block-level… more
- Intel Corporation (Folsom, CA)
- # **Welcome!**## .Senior Physical Design Engineer - CPU Core page is loaded## Senior Physical Design Engineer - CPU Corelocations: US, ... requisition id: JR0278532# **Job Details:**## Job Description:Intel's Silicon Engineering Group seeks a Senior CPU Core Physical Design Engineer to lead the … more
- Qualcomm (Santa Clara, CA)
- …and/or physical design to develop and verify high performance and low power CPU designs. * Anticipates, identifies, and solves complex problems to ensure ... Qualcomm CPU Engineer, you will lead innovative Central Processing Unit ( CPU ) design efforts that have a critical impact on industries across the world.… more
- Nutanix (Santa Clara, CA)
- …and/or physical design to develop and verify high performance and low power CPU designs. * Anticipates, identifies, and solves problems to ensure ... Qualcomm CPU Engineer, you will lead innovative Central Processing Unit ( CPU ) design efforts that have a critical impact on industries across the world.… more
- Apple Inc. (Santa Clara, CA)
- …engineers for CPU block-level physical design . Description As a CPU Physical Design Engineer, you will drive or participate in the following: ... synthesis/PNR tool features and optimizations and their adoption in CPU design Will work with x-functional top-level...Experience with Perl or TCL Preferred Qualifications Experience in low power, high frequency physical design… more
- Intel Corporation (Folsom, CA)
- A leading semiconductor company based in California is seeking a Senior Physical Design Engineer for CPU Core to lead the physical implementation of ... The ideal candidate will have significant experience in VLSI design , static timing analysis, and low power...role offers competitive compensation and benefits, along with the opportunity to work at the forefront of CPU technology.… more
- Qualcomm (Santa Clara, CA)
- …Familiarity with RISCV CPU architecture and ISA Understanding of low ‑power microarchitecture techniques Knowledge of high‑performance design strategies and ... Deliver design : collaborate with cross‑functional engineering teams to validate physical design aspects including timing, area, reliability, testability, and… more
- Nutanix (San Diego, CA)
- … delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability ... Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: We are hiring a talented... System Debug Architecture/RTL engineer targeted for high performance, low power devices. In this role, you will work… more
- Advanced Micro Devices (Santa Clara, CA)
- …work with IP and SOC Architecture team, RTL design team, verification team, and physical design team to drive the RTL design and microarchitecture of ... of front-end tools experience with synthesis, static timing, DFT Exposure to physical design and verification methods Experience with scripting languages such… more
- Apple Inc. (San Jose, CA)
- Physical Design Methodology CAD Engineer Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every ... Description Participating and engaging with cross functional teams to tackle key physical design challenges. Developing innovative solutions in physical … more
- Apple Inc. (San Diego, CA)
- …bus interfaces, CPU integration, DMA engines, Compression, Security IP design , and high‑speed/ low ‑speed peripherals like PCIE, QSPI, UART, and SPMI. ... all phases-from concept to silicon bring‑up. Work closely with physical design , DFT, and CAD teams to... principles and associated CDC requirements. Familiarity with ASIC low power design techniques, including multiple supply… more
- Intel Corporation (Santa Clara, CA)
- …and maintain timing constraints for IP blocks; provide guidance and support to physical design teams for synthesis, timing closure, and formal equivalence ... logic to meet power, performance, area, and timing goals while ensuring design integrity for physical implementation. Working closely with verification teams,… more
- Celestica Inc. (San Jose, CA)
- …Skip to Content Link Select how often (in days) to receive an alert: Principal, Design Engineering Date: Aug 4, 2025 Location: San Jose, CA, US Job Title: Principal, ... Design Engineering Functional Area: Engineering (ENG) Career Stream: Engineering...appplications at hyperscalers. Optimize code for performance, efficiency, and low latency Innovate new ideas in conjunction with networking… more
- SPACE EXPLORATION TECHNOLOGIES CORP (Sunnyvale, CA)
- …problems including clock domain crossings and power optimization Experience with multicore CPU subsystem design Experience with standard bus protocols (eg AXI, ... AHB, etc.) Experience with embedded processors Experience with high speed and low power design techniques Experience with EDA tools such as HDL simulators (eg… more
- Databricks Inc. (San Francisco, CA)
- …You will design and build systems that enable high-throughput, low -latency inference across CPU and GPU workloads, influence architectural direction, ... and observability). Strong foundation in algorithms, data structures, and system design as applied to large-scale, low -latency serving systems. Proven… more
- Databricks Inc. (San Francisco, CA)
- …You will design and build systems that enable high‑throughput, low ‑latency inference across CPU and GPU workloads, influence architectural direction, ... and observability). Strong foundation in algorithms, data structures, and system design as applied to large‑scale, low ‑latency serving systems. Proven… more
- Arm Limited (San Diego, CA)
- …to develop design intent, timing constraints required to enable implementation. Synthesis, Physical design and implementation of CPU and GPU cores, ... and build the knowledge base that makes custom SoC, CPU and GPU chip design possible. At...proven experience in ASIC Implementation, Synthesis, Timing constraints, UPF, Physical design , STA and Timing closure, Structured… more
- Vinci4d (Palo Alto, CA)
- …gdb, sanitizers (ASan/TSan), valgrind, and CPU /heap profilers; tune memory and CPU usage. Participate in code and design reviews; mentor junior engineers ... engineers to run thousands of simulations seamlessly, transforming how complex physical systems are designed and optimized. Our teams rely on high-performance… more
- Blue Origin LLC (Seattle, WA)
- …for the benefit of Earth. We're working to develop reusable, safe, and low -cost space vehicles and systems within a culture of safety, collaboration, and inclusion. ... orbital launch vehicle capable of routinely carrying people and payloads to low -Earth orbit, geostationary transfer orbit, cislunar, and beyond. Its first stage is… more
- Boeing (Everett, WA)
- …implementation of algorithms Experience with in numerical programming with parallelization and CPU /GPU coding knowledge Ability to write low level algorithms in ... Flight Sciences division. Flight Engineering is at the very heart of product-level design , integration and support. We work at every phase of the product lifecycle,… more
