• FPGA/ ASIC Engineer (Silicon Engineering)

    SpaceX (Redmond, WA)
    …+ Engage in high-level architectural design for test systems to support FPGA/ ASIC validation , generational interoperability, and integration with ... work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation , product engineering, ASIC implementation). In this… more
    SpaceX (11/26/25)
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  • ASIC Engineer

    Cisco (San Jose, CA)
    …provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography ... breadth of growth opportunities that working in a smaller ASIC team can provide. **Your Impact** As an ...with architects, and software teams will help guarantee seamless integration and optimal performance of Cisco's hardware platforms. You… more
    Cisco (01/10/26)
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  • Sr. ASIC Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    …EXPERIENCE: + Ability to solve complex problems including clock domain crossings and power optimization + ASIC /SoC system integration experience + Experience ... work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation , product engineering, ASIC implementation). In this… more
    SpaceX (01/11/26)
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  • ASIC & FPGA Design Engineer

    Lockheed Martin (Orlando, FL)
    …* Capturing and deriving requirements for FPGA designs \- Experience in Hardware\-Software Integration and Validation \- Active Secret Clearance with most recent ... with troubleshooting and debugging with board\-level testing and FPGA validation \- Experience in ASIC / FPGA... / FPGA life cycle \(architecture, design, simulation, verification, validation , integration & test\) \- Experience programming… more
    Lockheed Martin (11/13/25)
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  • ASIC /SOC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation , product engineering, ASIC implementation). In this ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply...physical design Scan Design Rule Check (DRC) tools + Integration and verification of Design for Test (DFT) fabrics… more
    SpaceX (12/27/25)
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  • Sr. ASIC Design Engineer, Cloud-Scale…

    Amazon (Austin, TX)
    …and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (12/30/25)
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  • Sr. ASIC Design Engineer, Cloud-Scale…

    Amazon (Austin, TX)
    …and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (11/14/25)
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  • Sr. SOC/ ASIC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation , product engineering and ASIC implementation). In this ... Sr. SOC/ ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply...BIST, and logic BIST, leveraging Siemens Tessent tools + Integration and verification of Design for Test (DFT) IPs… more
    SpaceX (01/11/26)
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  • ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Austin, TX)
    …and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer, you will: * Develop and implement high-performance, area and … more
    Amazon (12/18/25)
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  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    …work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation , product engineering, ASIC implementation). In this ... Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale,...foundry EDA kits into SpaceX environment, drive vendor IP integration into SpaceX infrastructure + Drive setting up RTL2GDSII… more
    SpaceX (01/11/26)
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  • Senior ASIC Design Engineer (NetSec)

    Palo Alto Networks (Santa Clara, CA)
    …ownership, shipping 2+ chips to mass production. + Solid experience with PCIe core integration and lab validation . + Expert SystemVerilog RTL skills. + Scripting ... and the kind of precision that drives great outcomes. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall… more
    Palo Alto Networks (12/15/25)
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  • Principal Engineer FPGA/ ASIC (Hybrid)(P4)

    RTX Corporation (Windsor Locks, CT)
    …a security clearance **Security Clearance:** DoD Clearance: Confidential Are you an FPGA/ ASIC engineer looking to make a real impact in aerospace technology? Join ... you will lead CPLD and FPGA designs, simulations, synthesis, and lab integration for high-performance systems, including processor card interfaces for digital and… more
    RTX Corporation (12/20/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …Impact:** You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will work ... and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. **Key… more
    Cisco (11/22/25)
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  • Lead ASIC Design Engineer, Amazon Leo

    Amazon (Austin, TX)
    …Key job responsibilities RTL Design and development of custom blocks. Integration of large subsystems Gate Level Simulation: Develop and maintain comprehensive ... gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions.… more
    Amazon (12/26/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What… more
    NVIDIA (01/10/26)
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  • ASIC DFT DV Technical Leader

    Cisco (San Jose, CA)
    …of the design + Collaborate with the design/design-verification and PD teams to enable the integration and validation of the test logic in all phases of the ... implementation and post silicon validation flows. + Work with the team on Innovative...innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the… more
    Cisco (12/13/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    …networking devices at the forefront of technology in terms of performance and power efficiency. Our team is at the heart of this challenge, verifying the ... within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation . + Lead the verification effort for core switching fabrics, packet… more
    NVIDIA (01/10/26)
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  • Hardware Validation (EDVT) Engineer

    Cisco (Austin, TX)
    …engineering group, you will collaborate with teams such as Hardware Design, ASIC Design, Power Engineering, Signal Integrity, Diagnostic Engineering, and ... the Team** The ENT (Enterprise) Hardware Assurance team supports electrical hardware validation testing across a broad range of products, including Cisco 8000 Series… more
    Cisco (01/12/26)
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  • HBM Integration Engineer

    Broadcom (Fort Collins, CO)
    …a Candidate Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division (APD) is focused on enabling customers to develop ... complex cloud computing AI engines, supercomputers, and networking, through to low power and the most advanced wireless solutions as examples. **Job Description:**… more
    Broadcom (12/03/25)
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  • Entry Level Signal and Power

    IBM (Rochester, MN)
    …analysis, power domain analysis, and 1st level chip packaging integration methodologies that enable hardware in IBM Mainframe and Quantum systems. Additionally, ... degree in Engineering, Computer Science, or Physics * Work experience in Microprocessor, ASIC , Signal and Power Integrity, 1st Level Chip Packaging, or Hardware… more
    IBM (01/07/26)
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