• Principal IC Static

    Cadence Design Systems, Inc. (Austin, TX)
    …impact on the world of technology. In this senior role you will; Perform Static timing analysis, glitch, noise analysis using Tempus Signoff tool. Executing and ... within Cadence and customer sites. Requirements; 8+ years of experience in Static timing analysis, Individual should be able to lead and execute technical… more
    Cadence Design Systems, Inc. (11/13/25)
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  • Principal Digital Design Engineer

    Renesas (Duluth, GA)
    …architecture, and verification reviews + Oversee digital backend design, including synthesis, static timing analysis, and logic equivalence checking + Create ... Principal Digital Design Engineer Job Description + Propose,...and DFT insertion with high coverage + Experience with static timing analysis and creation of place… more
    Renesas (12/12/25)
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  • Digital Implementation and Signoff,…

    Cadence Design Systems, Inc. (San Jose, CA)
    …related field + Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required + Prior experience with IC ... and Signoff including Place and Route, Design Closure, and timing /power signoff + Guide customers on how to best...Electrical, Engineering, or related field + Prior experience with IC digital implementation flows and font-end EDA tools including… more
    Cadence Design Systems, Inc. (12/02/25)
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