• DSP or Serdes RTL Sr Principal Digital…

    Cadence Design Systems, Inc. (San Jose, CA)
    …work full time in the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position Requirements This team is ... limited to: + Digital microarchitecture definition and documentation + RTL logic design, debug and functional verification + Strong...plus. + Familiar with the PMA/PMD/PCS layers of the Ethernet protocol is a plus. + Understanding of digital… more
    Cadence Design Systems, Inc. (10/17/25)
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  • Senior ASIC Design Engineer (NetSec)

    Palo Alto Networks (Santa Clara, CA)
    …+ **Write** clear design and micro-architecture specifications. + **Design** SystemVerilog RTL that meets area, performance, and power targets. + **Verify** your ... features. + **Partner** with physical-design teams: review synthesis/timing reports, rewrite RTL to close critical paths, and consult on floor-planning for… more
    Palo Alto Networks (12/15/25)
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  • Senior FPGA/ASIC Engineer (Onsite)

    RTX Corporation (Cedar Rapids, IA)
    …position is for a highly experienced, highly motivated Electrical or Computer Engineer that will be involved in the design, implementation, verification and ... FPGAs, and SoPCs for Collins Avionics solutions. As an engineer in this organization, you will be employing best...+ ASIC/FPGA/SoPC digital architecture development and design. + Develop RTL design code and simulation in VHDL, Verilog, and/or… more
    RTX Corporation (01/01/26)
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  • FPGA Senior Design Engineer

    Cisco (Milpitas, CA)
    …features. **Your Impact** We are seeking a highly experienced and accomplished FPGA Senior Design Engineer to provide technical leadership and deep expertise in ... Take ownership of complex FPGA sub-modules, from micro-architecture definition to RTL implementation using Verilog/SystemVerilog or VHDL. + Design & Architecture:… more
    Cisco (01/07/26)
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  • Senior FPGA Engineer

    RTX Corporation (Cambridge, MA)
    …are eligible for a security clearance **Security Clearance:** DoD Clearance: Secret **FPGA Engineer , P3** **Who We Are** RTX Corporation is an Aerospace and Defense ... of high-speed interfaces and experience developing in multiple programming domains, including RTL , VHDL, Verilog, and scripting languages will be leveraged to create… more
    RTX Corporation (11/19/25)
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  • Sr. Specialist, Electrical Engineer (ASIC…

    L3Harris (Herndon, VA)
    …domains in the interest of national security. Job Title: Sr. Specialist ASIC/FPGA Senior Design Engineer Job Code: 30428 Job Location: Herndon, VA (on-site) ... more than 100 countries. Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Design Engineer will be part of the key ASIC/FPGA design… more
    L3Harris (10/26/25)
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  • Senior Emulation Engineer

    Cisco (San Jose, CA)
    …as experience with compilation, debug, performance testing. + Prior experience with RTL development for Emulation prototypes. + Prior experience with C/C++ and TCL ... is a plus. + Experience with protocols eg PCie, I2C, Ethernet packet headers, Ethernet protocol is preferred. **Why Cisco?** At Cisco, we're revolutionizing how… more
    Cisco (01/08/26)
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  • Senior Digital Design Engineer

    NVIDIA (Santa Clara, CA)
    …and fiber channels, supporting NVIDIA's high-performance interconnect protocols: NVLINK, Ethernet , and InfiniBand. We recently delivered the industry's first 200G ... and adaptation algorithms, which then will be translated into RTL and firmware designs. For backend design, you will...Knowledge of physical layer and communication protocols, such as Ethernet , InfiniBand, PCIe, and USB. + Understanding of on-chip… more
    NVIDIA (12/09/25)
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  • Senior Principal Emulation Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. Design Engineer - Emulation & High-Speed Interfaces Palladium Solutions Development Why Join Us We're ... system emulation and verification solutions-and we're looking for a seasoned Design Engineer to help lead the way. If you're passionate about high-speed interfaces,… more
    Cadence Design Systems, Inc. (11/18/25)
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  • ASIC/FPGA Design Engineer (SMES)

    L3Harris (Camden, NJ)
    …cyber domains in the interest of national security. Job Title: ASIC/FPGA Design Engineer (SMES) Job Code: 32295 Job Location: Camden, NJ Schedule: 9/80 Regular with ... of $ 15,000 . Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA… more
    L3Harris (12/20/25)
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  • FPGA/ASIC Verification Engineer

    L3Harris (Columbia, MD)
    …land, sea and cyber domains in the interest of national security. Job Title: Senior Specialist, Electrical Engineer - FPGA/ASIC Verification Engineer Job ... systems that protect those who protect us. As an FPGA Verification Engineer , you'll collaborate with a talented, mission-driven team, verifying next-generation FPGA… more
    L3Harris (12/21/25)
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