• Qualcomm (San Diego, CA)
    …is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation and internal ... EDA tools, design analysis and optimization tools and platforms, low power architecture, methodology , and IP, and foundation IP development. About the Role As a… more
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  • Qualcomm (San Diego, CA)
    …Engineering Group, Engineering Group > ASICS Engineering General Summary: As a Timing Engineer , you will play a vital role in Timing analysis targeting the Mobile, ... PT/PT-SI and Tempus. You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in...on contribution for STA timing sign off. A timing Engineer should be able to understand all kind of… more
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  • Lockheed Martin (Sunnyvale, CA)
    Description Join Our Team as a ASIC /FPGA Verification Engineer where you will work on the development of a sophisticated state‑of‑the‑art avionics product in a ... world, and are seeking a highly talented and motivated ASIC & FPGA Verification Engineer who has...for a given design. Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux‑based… more
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  • Meta (Austin, TX)
    …teams towards creating a first-pass silicon success. Required Skills: ASIC Engineer , Formal Verification Responsibilities: Provide technical leadership ... Summary: Meta is hiring ASIC Formal Verification Engineer within the...Formal Verification Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at… more
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  • Meta (Sunnyvale, CA)
    Summary Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... (SoC) for data center applications. As a Design Verification Engineer , you will be part of an agile team...the best in the industry, focused on developing innovative ASIC solutions for Facebook's data center applications. You will… more
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  • Theconstructsim (Milpitas, CA)
    …insurance Paid time off Relocation bonus Vision insurance Job Title: Front-End ASIC Design Engineer - Milpitas, CA Responsibilities Support customer's design ... through all phases of ASIC execution at Socionext. Ensure designs meet product Performance‑Power‑Area‑Schedule...Model Headquartered in New Jersey US Based Engineers Only Methodology and Process Driven Top performing engineers are the… more
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  • SQL Pager LLC (San Jose, CA)
    …environments including testbenches, scoreboards, regressions, tools, infrastructure and methodology Produce functional / code coverage metrics Run regression ... or MSEE with 1+ years experience Advanced knowledge of standard ASIC /FPGA verification flows including simulation, testbench development, and post silicon bring-up… more
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  • Hewlett Packard Enterprise Development LP (San Jose, CA)
    ASIC Engineer Sr StaffThis role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office.**Who We ... for next-generation networking platforms. We are looking for a seasoned**Design-for-Test (DFT) Engineer ** to join our team and contribute to the development of… more
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  • Advanced Micro Devices (Santa Clara, CA)
    …used in large‑scale AI and machine learning applications. Driving power methodology for AI‑specific hardware components (like tensor cores and matrix multiplication ... modeling: Creating power models and scripts for performance/power trade‑offs. Methodology Development: Researching, developing, and deploying methodologies and automated… more
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  • Qualcomm (Santa Clara, CA)
    …circuit design for wireless products (eg, LNAs, PLLs) and 4+ years in ASIC design, verification, or related work. OR Master's degree in Electrical Engineering or ... related field with 4+ years of ASIC design/verification experience. OR PhD in Electrical Engineering or related field with 2+ years of ASIC design/verification… more
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  • Eridu Corporation (San Francisco, CA)
    …fabrics, leveraging your extensive experience in networking. Technical Expertise in ASIC Verification:Provide technical leadership in the verification of complex ... ASIC designs, ensuring compliance with industry standards and project...Verification Skills: Expertise in Hardware Verification and Hardware Verification Methodology (eg, System Verilog, OVM/VMM/UVM) with a strong understanding… more
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  • Google Inc. (Sunnyvale, CA)
    Physical Design Engineer , 3D Technology, PhD, University Graduate Experience driving progress, solving problems, and mentoring more junior team members; deeper ... its integration within AI/ML-driven systems. As a Physical Design Engineer in 3D Technology, you will collaborate with technology,...to overcome the slowing of Moore's Law while delivering ASIC 's and SoC's. You will help develop new 3D… more
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  • Qualcomm (San Diego, CA)
    …Engineering Group > ASICS Engineering General Summary: As a foundry technology engineer , you will be working in an exciting fast growing automotive semiconductor ... degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in… more
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  • Leidos (Bethesda, MD)
    Description Leidos is currently looking to add a Test and Integration Engineer to a Cyber Security Program near Ft. Meade, MD. This challenging position supports a ... "C" and "Tcl/TK" code languages. Conduct functional verification and testing of new ASIC designs prior to fabrication using Field Programmable Gate Arrays (FPGA) to… more
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  • Apple Inc. (Sunnyvale, CA)
    …and debugging, and coverage closure. Expertise in SystemVerilog coding and UVM methodology Preferred Qualifications Dedicated/hands-on ASIC & SOC DV experience. ... high speed layered protocols, low-power driven architecture, and best-in-class DV methodology . You will gain knowledge on Wireless protocols, FW-HW interactions, and… more
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  • Advanced Micro Devices (Santa Clara, CA)
    …with global Front-End design team and physical design team for large scale ASIC chip physical implementation Drive design and methodology improvements across ... AXI and various standard peripherals & interfaces is required ASIC DV experience in reusable verification methodology ...required ASIC DV experience in reusable verification methodology such as UVM Have hands‑on experience in SOC… more
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  • Cadence Design Systems (San Jose, CA)
    …and enable the products. We are now looking for a hands-on system integration engineer who wants to expand his/her scope, work with the interactions of a complex ... function to bridge and gate-keep the full integration, validation, and characterization of ASIC , HW/PCB, SW, FW, and FPGA subsystems in the whole development cycle.… more
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  • Theconstructsim (Milpitas, CA)
    …9+ years of experience or equivalent experience. MSEE preferred. Experience in ASIC Physical Design; Experience in an SoC product development organization with ... tools like ICC2/Innovus. Scripting (Perl/Tcl/Python) is required. Good understanding of ASIC frontend design. Experience in both Flat and Hierarchical layouts.… more
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  • NVIDIA Corporation (Santa Clara, CA)
    Senior Architecture Energy Modeling Engineer page is loaded## Senior Architecture Energy Modeling Engineerlocations: US, CA, Santa Claratime type: Full timeposted ... are now looking for an Sr. Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...of NVIDIA GPUs.As a member of the Power Modeling, Methodology and Analysis Team, you will collaborate with Architects,… more
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  • Intel Corporation (Santa Clara, CA)
    # **Welcome!**## .Senior Design Engineer - AI SoC Development page is loaded## Senior Design Engineer - AI SoC Developmentlocations: US, California, Folsom: US, ... applications, from edge devices to data center accelerators. If you are an engineer with strong technical and communication skills who thrives in a fast-paced… more
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