• SystemVerilog /UVM Design…

    US Tech Solutions (Goleta, CA)
    …independently and take ownership of verification deliverables within a UVM/ SystemVerilog environment. + The engineer will collaborate with design, ... **Job Description:** + The Verification Engineer will contribute to the...experience in Pre-Silicon Design Verification (FPGA or ASIC ). + Strong proficiency in SystemVerilog and… more
    US Tech Solutions (01/13/26)
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  • ASIC /FPGA Verification

    The Boeing Company (El Segundo, CA)
    …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Verification Engineer on the Boeing Electronic Products team ... verification processes + Familiarity with defining the architectural framework for ASIC /FPGA verification using SystemVerilog /UVM, including the delivery… more
    The Boeing Company (01/11/26)
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  • ASIC /FPGA Verification

    Lockheed Martin (Denver, CO)
    **Description:** Join Our Team as a ** ASIC /FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... world, and are seeking a highly talented and motivated ** ASIC & FPGA Verification Engineer **...verification plan for a given design\. * Use SystemVerilog and Universal Verification Methodology \(UVM\) to… more
    Lockheed Martin (12/10/25)
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  • ASIC /FPGA Principal Verification

    Lockheed Martin (Highlands Ranch, CO)
    **Description:** Join Our Team as a ** ASIC /FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... Space's Silicon Solutions team and seeking a future\-looking Principal Verification Engineer who is able to case...in this role, you will need:** * Experience in verification of FPGA and ASIC devices *… more
    Lockheed Martin (12/06/25)
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  • Principal / Senior Principal FPGA/ ASIC

    Northrop Grumman (Linthicum Heights, MD)
    …in HDL (VHDL/Verilog) and HVL ( SystemVerilog ) + Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with ... for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a...HVL ( SystemVerilog ) + Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology… more
    Northrop Grumman (01/07/26)
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  • ASIC Design Verification

    Google (Sunnyvale, CA)
    ASIC Design Verification Engineer , University Graduate _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Early** Experience completing work as directed, ... SystemVerilog for ASICs. + Experience in power aware verification , gate level simulations, and post silicon bring-up. +...and post silicon bring-up. + Experience with the full verification life cycle. + Familiarity with ASIC more
    Google (12/17/25)
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  • ASIC Engineer , Design…

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (01/06/26)
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  • ASIC Engineer , SoC…

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , SoC Verification Responsibilities: 1. Define and… more
    Meta (12/20/25)
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  • ASIC Engineer , Design…

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (12/20/25)
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  • ASIC Engineer , Performance…

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Performance & Package Verification Responsibilities:… more
    Meta (12/20/25)
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  • FPGA/ ASIC Verification

    L3Harris (Columbia, MD)
    …of national security. Job Title: Senior Specialist, Electrical Engineer - FPGA/ ASIC Verification Engineer Job Code: 31975 Job Location: Rochester, ... that protect those who protect us. As an FPGA Verification Engineer , you'll collaborate with a talented,...in Object Oriented Programming(C++, JAVA). + Proven proficiency in FPGA/ ASIC verification using SystemVerilog . +… more
    L3Harris (12/21/25)
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  • Senior Engineer - ASIC /FPGA…

    BAE Systems (Cedar Rapids, IA)
    …self-checking testbenches in SystemVerilog /UVM, OVM, and/or VHDL + Experience with ASIC /FPGA design and verification tools (eg Siemens or Cadence) + Proven ... incentives may be available based on position level and/or job specifics. **Senior Engineer - ASIC /FPGA Verification (hybrid)** **119641BR** EEO Career Site… more
    BAE Systems (12/24/25)
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  • ASIC Verification Engineer

    Cisco (Maynard, MA)
    …to a company culture that empowers an inclusive future for all. **Your Impact** The ASIC Design Verification Technical Lead Engineer will be working on ... or equivalent related work experience. . Experience with the latest ASIC verification methodologies, tools, and scripting/programming languages . Experience… more
    Cisco (12/20/25)
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  • ASIC Engineer , Formal…

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
    Meta (12/20/25)
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  • Principal ASIC Design Verification

    Palo Alto Networks (Santa Clara, CA)
    …and the kind of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ... - MSEE preferred + Minimum 5 years experience in ASIC design verification + Demonstrated success in...products from concept to mass production + Expertise in SystemVerilog and UVM + Technical strength in the following… more
    Palo Alto Networks (12/10/25)
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  • Intern - ASIC Design Verification

    Micron Technology, Inc. (Minneapolis, MN)
    …experienced engineers and build a strong foundation in ASIC verification . **Responsibilities** + Work with UVM-based SystemVerilog testbenches to verify ... methodologies that uphold Micron's standards of excellence. **Position Overview** As a Design Verification Engineer Intern, you will join a highly motivated team… more
    Micron Technology, Inc. (12/26/25)
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  • ASIC Design Verification

    Cisco (Maynard, MA)
    …back to a company culture that empowers an inclusive future for all. **Your Impact** The ASIC Design Verification Co-Op Engineer will be a member of a team ... enrolled in a full-time graduate program + Knowledge of the latest ASIC verification methodologies, tools and scripting/programming languages + Knowledge of… more
    Cisco (11/16/25)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading GPUs. In this role, you will be doing unit level verification of ... or computer engineering or similar area (or equivalent experience) + 5+ years of verification experience + Exposure to Computer Architecture, ASIC design and … more
    NVIDIA (01/08/26)
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  • Senior FPGA/ ASIC Engineer (Onsite)

    RTX Corporation (Cedar Rapids, IA)
    …analysis, linting analysis, LEC, and clock-domain-crossing analysis. + Perform ASIC /FPGA/SoPC verification using inspection, analysis, simulation, and test ... you interested in becoming part of a growing Avionics FPGA/ ASIC team? This position is for a highly experienced,...for a highly experienced, highly motivated Electrical or Computer Engineer that will be involved in the design, implementation,… more
    RTX Corporation (01/01/26)
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  • ASIC Design Verification

    Cisco (San Francisco, CA)
    …& route, and timing closure. **Preferred Qualifications** ** ** + Experience with ASIC verification methodologies (eg, UVM, SystemVerilog ) + Understanding of ... opens. Applications are accepted until further notice. **Meet the Team** The ASIC Group works closely with other development teams within Cisco, including marketing,… more
    Cisco (12/16/25)
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