- Microsoft Corporation (Raleigh, NC)
- …a trusted experience to customers and partners worldwide and we are looking for a ** DDR IP Verification Engineer ** to help achieve that mission. ... to Microsoft cloud hardware. We are looking for a ** DDR IP Verification Engineer...a memory controller Intellectual Property ( IP ) and/or Double Data Rate ( DDR ) subsystem… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a Technical Presales Engineer , you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and publications. As ... of different memory interface standards to architect memory solutions for customers using Cadence DDR IP . This role offers the benefit of both technical growth… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …of different memory interface standards to architect memory solutions for customers using Cadence DDR IP . This role offers the benefit of both technical growth ... of the Technical Field Organization helping educate customers and providing solutions using our DDR IP portfolio. Our memory PHY and controller IPs are used in… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our ... team focused on the development and support of high-performance IP related to memory protocols such as DDR...world. We are seeking a Post Silicon Memory Product Engineer to support silicon bring-up, debug, and production ramp… more
- Meta (Menlo Park, CA)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....We are looking for individuals with experience in Design Verification to build IP and System On… more
- Meta (Sunnyvale, CA)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /System on Chip (SoC) ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....We are looking for individuals with experience in Design Verification to build IP and System On… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and hardware/software co- verification Nice to Have + Experience building Acceleratable Verification IP (AVIP) + Familiarity with end-to-end verification ... are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our… more
- Cisco (Milpitas, CA)
- …requirements. + IP Integration: Integrate and verify internal and third-party Intellectual Property ( IP ) cores, such as high-speed memory controllers ... We are seeking a highly experienced and accomplished FPGA Senior Design Engineer to provide technical leadership and deep expertise in the architecture, design,… more
- Microsoft Corporation (Raleigh, NC)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** + Establish yourself ... to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers. + Embody our… more
- Broadcom (San Jose, CA)
- …+ Familiarity with overall chip design methodologies and tools + Knowledge of CPU, DDR , Bus Protocol , Network Protocol or DSP design preferred **Additional ... The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP , is looking for qualified individuals to work in SoC and IP … more
- Microsoft Corporation (Raleigh, NC)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Principal Verification Engineer ** to join the team. **Responsibilities** + Lead an SoC ... to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers. + Embody our… more
- Applied Materials (Santa Clara, CA)
- …more about our benefits (https://hrportal.ehr.com/applied/) . As an Electrical Engineer , you are responsible for designing, modifying, and troubleshooting electrical ... **Position Overview** We are seeking an experienced FPGA Design Engineer with strong expertise in Xilinx Zynq SoC/MPSoC platforms...Development** * Design and implement FPGA logic using Vivado, IP Integrator, and Vitis. * Develop RTL modules in… more
- SpaceX (Sunnyvale, CA)
- …Experience in IP integration (eg memories, I/O's, analog IPs, SerDes, DDR etc.) + In-depth knowledge of industry standard EDA tools, understand their ... Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was...spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation… more
- Cisco (Milpitas, CA)
- …Integrate developed IP cores and third-party modules (eg, PCIe, AXI, DDR ) into the top-level FPGA design; actively define interfaces between the FPGA and ... **Your Impact** We are looking for a skilled and proactive FPGA Design Engineer with 3+ years of industry experience to manage and implement complex digital… more
- Amazon (Austin, TX)
- …IR drop analysis, physical verification , and ECO - 4+ years in integrating IP and ability to specify and drive IP requirements in the physical domain. ... integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring… more
- Amazon (Austin, TX)
- …organization, you'll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, ... around the world. As a Circuit & Design Analysis engineer , you'll collaborate with multiple teams to drive improvements...job responsibilities - Design and implement custom cells / IP . - Develop & run characterization flows for custom… more
- Micron Technology, Inc. (Richardson, TX)
- …than ever. Micron is seeking a highly motivated and experienced ASIC Design Engineer to define and drive the architecture of next-generation ASICs prototypes. These ... using modeling and simulation tools. + Specify and evaluate IP blocks such as ECC engines, DMA controllers, memory...such as ECC engines, DMA controllers, memory interfaces (eg, DDR , LPDDR, ONFI, UCIe, PCIe, NVMe), and die-to-die communications… more
- Google (Sunnyvale, CA)
- SoC Silicon Top-Level Floorplan Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision making, solving ... collaborating with cross-functional teams (eg, architecture, RTL design, synthesis, verification ). + 3D IC design experience (eg, multi-die partitioning, TSV… more
- Micron Technology, Inc. (Richardson, TX)
- …or equivalent preferred + D2D design experience is a plus + Familiar with IP level verification and strong RTL debugging capabilities is a plus **Required ... industry! **Position Overview:** We are searching for a Principal HBM IO Architecture Design engineer own the development of the PHY IO on the interface die in HBM… more