• Principal/ Senior Principal Digital ASIC

    Northrop Grumman (Jessup, MD)
    …solutions a reality and deliver remarkable new advantages to the warfighter. We are seeking a front - end ASIC design engineer for design and ... test) of ASIC design + Working knowledge of the front - end ASIC design flow from RTL to gates (RTL coding, simulation, synthesis, static… more
    Northrop Grumman (12/05/25)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Design Engineer (NetSec)

    Palo Alto Networks (Santa Clara, CA)
    …BS in EE, CE, or CS (MSEE or equivalent military experience preferred). + 10+ years' front - end ASIC design ownership, shipping 2+ chips to mass ... and the kind of precision that drives great outcomes. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall… more
    Palo Alto Networks (12/15/25)
    - Save Job - Related Jobs - Block Source
  • ASIC /FPGA Research Engineer - Digital…

    University of Southern California (Arlington, VA)
    …Division has an opening in Arlington, VA for an ASIC /FPGA Research Engineer - Digital Design , to perform front - end digital design of advanced ASIC ... Del Rey, CA; and Waltham, MA. Perform digital hardware design in a fast-moving research setting and work toward...your employment with the University of Southern California to end , you will receive one (1) month written notification… more
    University of Southern California (11/19/25)
    - Save Job - Related Jobs - Block Source
  • Sr Engineering Manager

    Honeywell (Plymouth, MN)
    …in the semiconductor industry with at least 5 years of experience in FPGA and Front - End ASIC design and Functional Verification + Demonstrated leadership ... Lead an 18 plus member team of Integrated Circuit Design (ICD) engineers + Lead Short- and Long-Term Strategy...Oversight + Lead talent management exercises for mid-year and end of year performance reviews + Partner with the… more
    Honeywell (01/09/26)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Front End

    NVIDIA (Santa Clara, CA)
    …efficiency and support + Improve the speed, flexibility and extensibility of the GPU front end build flow + Keep the GPU Continuous Integration system at ... NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop...of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so… more
    NVIDIA (10/28/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Design Technical Leader…

    Cisco (San Jose, CA)
    …and resolving timing issues across all design levels. You will collaborate with Front - end and Back- end teams to understand chip architecture and guide ... startup-style team. You'll collaborate with exceptional talent with deep ASIC design and development expertise. As part...+ 1 paid day off for employee's birthday, paid year- end holiday shutdown, and 4 paid days off for… more
    Cisco (11/18/25)
    - Save Job - Related Jobs - Block Source
  • Specialist, Electrical Engineer ( ASIC

    L3Harris (Herndon, VA)
    …sea and cyber domains in the interest of national security. Job Title: Specialist ASIC /FPGA Design Engineer Job Code: 30424 Job Location: Herndon, VA (on-site) ... customers in more than 100 countries. Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Design Engineer will be part of the key ASIC more
    L3Harris (01/07/26)
    - Save Job - Related Jobs - Block Source
  • ASIC Digital Design Engineer

    Teledyne (Goleta, CA)
    …clocking) and block diagrams. + Creating risk assessments and traceability matrices. + RTL Front - End Design + Behavioral modeling of digital controllers (eg, ... on a team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer: Oversees definition, ...testability). + Clock/Power optimization for low-power ASICs. + Perform Back- End Physical Design as needed + Floorplanning… more
    Teledyne (11/21/25)
    - Save Job - Related Jobs - Block Source
  • ASIC /FPGA Design Engineer (SMES)

    L3Harris (Camden, NJ)
    …land, sea and cyber domains in the interest of national security. Job Title: ASIC /FPGA Design Engineer (SMES) Job Code: 32295 Job Location: Camden, NJ Schedule: ... customers' mission-critical needs always in mind, our employees deliver end -to- end technology solutions connecting the space, air,...Engineering Staff (SMES) will be part of the key ASIC /FPGA design team, responsible for the delivery… more
    L3Harris (12/20/25)
    - Save Job - Related Jobs - Block Source
  • Sr. Technical Program Manager, ASIC

    Amazon (Sunnyvale, CA)
    …/SOC development of managing various phases of pre-silicon such as architecture, front end design , pre-silicon verification, FPGA prototyping, Emulation, ... ASIC /SOC leads) to create project execution plans for ASIC /SOC development considering all criteria to design ...for ASIC /SOC development considering all criteria to design products the meet the power/performance and functional specs… more
    Amazon (11/27/25)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Engineer - SDC

    Cisco (San Jose, CA)
    …and resolving timing issues across all design levels. You will collaborate with Front - end and Back- end teams to understand chip architecture and guide ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...+ 1 paid day off for employee's birthday, paid year- end holiday shutdown, and 4 paid days off for… more
    Cisco (12/03/25)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Design Engineer…

    NVIDIA (Santa Clara, CA)
    …familiarity and experience with all stages of ASIC design flow including front end design and verification, DFT, and timing analysis + Strong team ... We are now looking for a motivated Senior ASIC Design Engineer to join our...performance and quality expectations. + Work with front - end teams to overlook correctness of the design more
    NVIDIA (11/26/25)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Design Engineer - Clocks…

    NVIDIA (Santa Clara, CA)
    …and DFT teams. + Get involved in end -to- end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks ... today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...GPU and CPU clocking. The team collaborates with the front design team to understand the clocking… more
    NVIDIA (10/28/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Clocks Design Engineer - New…

    NVIDIA (Santa Clara, CA)
    …and DFT teams. + Get involved in end -to- end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks ... today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is...GPU and CPU clocking. The team collaborates with the front design team to understand the clocking… more
    NVIDIA (01/10/26)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Networking Architecture…

    Meta (Menlo Park, CA)
    …models, performance analysis, and performance correlation 15. Experience in developing PCIe-based NICs, Front - end and Back- end NICs 16. Experience with QEMU ... **Summary:** As a Networking ASIC Engineer on the Infrastructure Silicon team at...teams working on data center networking architecture, network system design , micro-architecture, RTL design , Design more
    Meta (12/20/25)
    - Save Job - Related Jobs - Block Source
  • Project Engineer II, ASIC /FPGA Group

    Lockheed Martin (Denver, CO)
    …and analysis\. The ideal candidate will have experience or be familiar with front \- end ASIC or FPGA \(circuitware\) processes, tools, development lifecycle ... **Description:** Join Our Team as an ** ASIC & FPGA Project Engineer** where you will...features of Atlassian JIRA\. * Experience or coursework in design , debug and/or verification of ASICs or FPGAs *… more
    Lockheed Martin (12/25/25)
    - Save Job - Related Jobs - Block Source
  • Senior Custom ASIC Engineering Lead

    Broadcom (Irvine, CA)
    …protocols. + Logic design , chip architecture, microarchitecture, Verilog RTL coding Front - end logic design verification, DRC, logic synthesis + Knowledge ... and internal cross-functional teams in areas such as physical design , STA, DFT, and packaging? Have you taped out...major segments of the Semiconductor industry, including AI. Our ASIC products division is looking for a senior engineer… more
    Broadcom (11/06/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Verification and Infrastructure…

    NVIDIA (Santa Clara, CA)
    …be doing: + Improve the speed, flexibility, and extensibility of the High-Speed IO front end integration, build, and verification flows + Apply best in class ... or closely related degree (or equivalent experience) + Exposure to computer architecture, ASIC design , and verification methodology is required + Exposure to … more
    NVIDIA (01/10/26)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …organization as an ASIC Implementation Technical Lead with a primary focus on Design -for-Test. You will work with Front - end RTL teams, backend physical ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...+ 1 paid day off for employee's birthday, paid year- end holiday shutdown, and 4 paid days off for… more
    Cisco (11/22/25)
    - Save Job - Related Jobs - Block Source
  • Sr. ASIC Design Engineer, Blink/Ring…

    Amazon (Hawthorne, CA)
    …to deliver high quality RTL -Ensure quality by running and tracking results of front - end tools including: Synthesis, Lint (RTL, DFT, UPF), Power Analysis and STA ... that have gone to volume production -Hands on experience in low power design techniques -Strong written and verbal skills Preferred Qualifications -Master's or Ph.D… more
    Amazon (01/06/26)
    - Save Job - Related Jobs - Block Source