- Cerebras (Sunnyvale, CA)
- …over 10 times faster than GPU-based hyperscale cloud inference services. About The Role As a lead front-end design engineer , you will be a key part of the ... Wafer Scale Engine (WSE). This role requires deep expertise in RTL design and integration, with a strong focus on delivering high-performance, power-efficient,… more
- Advanced Micro Devices (Santa Clara, CA)
- …The ideal candidate will have a proven track record in creating scalable digital microarchitectures and will work closely with various teams to ensure the successful ... delivery of complex SoCs. Candidates must possess excellent leadership, communication, and collaboration skills. A background in computer engineering or electrical engineering is preferred. #J-18808-Ljbffr more
- Advanced Micro Devices (Santa Clara, CA)
- …AMD. KEY RESPONSIBILITIES Technical Microarchitecture lead on AMD Data Fabric RTL design team focused on driving the best scalability, modularity, power, ... In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team, and physical design team to drive the … more
- Intel Corporation (Santa Clara, CA)
- …seeking a Senior Design Engineer - AI SoC Development in California to lead logic design and RTL coding for cutting-edge AI applications. The ideal ... candidate will have over 7 years of experience in ASIC/SoC development, strong technical skills, and a collaborative mindset. Responsibilities include defining architecture, optimizing designs for performance and power, and mentoring junior engineers. This… more
- Theconstructsim (Milpitas, CA)
- A semiconductor solutions company based in Milpitas, CA, is seeking a Sr Design Verification Engineer to oversee verification methodologies and collaborate with ... design teams to ensure compliance with project specifications. The ideal candidate will possess a BS/MS in Computer Science or Electrical Engineering and have 5-10+ years of experience in high volume IC production, including strong UVM capabilities and… more
- Cerebras (Sunnyvale, CA)
- A leading AI hardware company in California seeks a lead front-end design engineer to spearhead the next generation of its groundbreaking Wafer Scale Engine. ... The ideal candidate will possess 10+ years of RTL design experience and a master's degree, with skills in high-performance computing and collaboration with… more
- Eridu Corporation (San Francisco, CA)
- A technology startup in San Francisco is seeking a PCIe Lead Engineer to provide technical leadership in microarchitecture and RTL execution. Candidates ... should have an MSEE and over 15 years of ASIC/SoC RTL design experience, specifically in PCIe protocol design . You will develop high-performance PCIe… more
- Chelsea Search Group (Minneapolis, MN)
- Lead ASIC Design Engineer Minneapolis,...integrate that design into the current architecture. RTL Design and Synthesis: Use Synopsys Design ... PTO + Stock Option Plan. Job Description As ASIC Design Lead , you will play a pivotal...skills and attention to detail. A strong background in RTL based digital IC design using Verilog/SystemVerilog.… more
- Intel Corporation (Santa Clara, CA)
- # **Welcome!**## .Senior Design Engineer - AI SoC Development page is loaded## Senior Design Engineer - AI SoC Developmentlocations: US, California, ... Computer Engineering, or Computer Science* 7+ years of experience in RTL design and implementation for ASIC/SoC development**Preferred Qualifications** *… more
- Altera (San Jose, CA)
- …on our journey to becoming the world's #1 FPGA company!**About the Role**As a Sr. Physical Design Tech Lead / Engineer at Altera, you will play a critical role ... logic blocks, routing fabrics, I/O rings, on-chip power domains).**Key Responsibilities** Lead and execute physical design implementation tasks (floorplanning,… more
- Cadence Design Systems (San Jose, CA)
- Lead Applications Engineer DDR Design IP page is loaded## Lead Applications Engineer DDR Design IPlocations: SAN JOSEtime type: Full timeposted ... matter where you are in your career. As a Lead Technical Presales Engineer , you will use...definers and designers Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts… more
- Analog Group (San Jose, CA)
- The Sr. Digital Design Engineer candidate must have demonstrated success in digital design & verification/infrastructure development for digital FPGAs/ASICs. ... Other key skills include technical/project leadership, documentation, RTL design knowledge, backend flow and tools...flow and tools knowledge. Candidate will be expected to lead designer, verification, and be technical focus on one… more
- Analog Devices, Inc. (Wilmington, MA)
- …Digital Design Engineer ** **About the Role** As a Senior Digital Design Engineer , you will lead block-level designs and verification efforts. You'll ... Digital IC Design Engineer page is loaded## Digital...or equivalent* Several years of relevant experience in digital design engineering including RTL design ,… more
- Amazon (San Francisco, CA)
- Sr. ASIC Design Engineer , Cloud-Scale Machine Learning Acceleration team Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure ... integration of emergent technologies. We're looking for an ASIC Design Engineer to help us trail‑blaze new...post‑silicon validation teams, and synthesis, timing, and back‑end experts. Lead design projects to meet requirements or… more
- Intel Corporation (Folsom, CA)
- …Details:**## Job Description:Intel's Silicon Engineering Group seeks a Senior CPU Core Physical Design Engineer to lead the physical implementation of ... # **Welcome!**## .Senior Physical Design Engineer - CPU Core page...Responsibilities Physical Design Implementation Execute complete physical design flow for custom CPU designs from RTL… more
- Qualcomm (San Diego, CA)
- …transformation to help create a smarter, connected future for all. As a Qualcomm CPU Engineer , you will lead CPU design efforts with a critical impact ... with teams to validate constraints, verification, STA, and physical design ; resolve issues independently. Lead block-level or...Design , STA, and PDN activities; work independently in RTL to GDSII implementation. Apply knowledge of low power… more
- Credo Semiconductor, Inc. (San Jose, CA)
- …technologies - because at Credo, We Connect. About the Role As a Senior Physical Design Engineer , you will manage all aspects of physical design and ... PD/integration teams in China and Taiwan to ensure successful tapeouts. Responsibilities Lead and drive top-level, IP, and block-level physical implementation from … more
- Encore Semi Llc (San Jose, CA)
- Sr Physical Design Engineer (Remote) Full-time: Salary + Benefits + Bonuses / Contractor Work Status: US citizen or Lawful Permanent Resident. Remote (Anywhere ... in US) Responsibilities Lead full-chip and block-level physical design for...routing of critical paths. Establish, improve, and scale physical design methodologies, automation, and RTL -to-GDS flows. Provide… more
- Kubelt (Alameda, CA)
- …Real-Number based modeling and verification is a must 5+ years of experience in RTL based digital design capture and verification Sound understanding of closing ... for interfacing with the brain and seeking an experienced lead digital IC designer to take a leading role...IPs in fabricated silicon products is required Experience with RTL -to-GDS digital design implementation using industry standard… more
- SupportFinity (TM) (Boston, MA)
- …circuits, semiconductors, and general computer architecture Ability to write detailed design specifications Ability to lead multi-disciplinary technical teams ... and motivated individuals to tackle challenging engineering problems in advanced digital IC design . As a Senior Digital ASIC Designer, you will be responsible for… more
