- quadric.io, Inc (Burlingame, CA)
- …of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C ++ DSP and control code. Role: This is a rare opportunity to get in on ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog + Own Power, Performance & Area… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC , C / C ++, Matlab, etc. * UVM concepts * Directed, ... $116,245.00 - $190,900.00 Security Clearance: TS/SCI with Poly Level of Experience: Senior This opportunity resides with Warfare Systems (WS), a business group… more
- Amazon (San Diego, CA)
- …team and participate in system level verification using test benches constructed using UVM, SystemC and DPI- C . Develop a highly automated environment to triage ... subsystem to facilitate testing of the DUT against reference Matlab/ C models. . Develop detailed test plans and write...or a related field - 3+ years of UVM, C , System C , and scripting experience -… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Job Title: Senior Principal Product Engineer Location: Global (remote) Reports to: Technical Business ... Development Director Job Overview: The Senior Field Applications Engineer (FAE) position serves...hardware-software interface design. + Programming Proficiency: Advanced skills in C / C ++ and Python; experience with build systems,… more
- Cisco (Maynard, MA)
- …methodologies, tools, and scripting/programming languages . Experience with C +. Experience with SystemVerilog/UVM, SystemC **Preferred Qualifications:** ... for all. **Your Impact** The ASIC Design Verification Technical Lead Engineer will be working on next-generation 100G-1.6T coherent optical communications products.… more