- IC Resources (San Francisco, CA)
- We are hiring a Senior RTL Design Engineer to own memory subsystems in high-performance AI accelerators. This role will deliver the bandwidth, latency, ... subsystems as gaps arise. Skills & background BS/MS in EE/CE, 8+ years of RTL design in advanced SoCs. Strong SystemVerilog coding and micro-architecture skills.… more
- Advanced Micro Devices (San Jose, CA)
- …AI and beyond. Together, we advance your career. THE ROLE: We are looking for a self‑motivated senior design engineer to be part of a leading team to drive ... technologies to market. As a key contributor, you will focus on RTL design and validation of high‑speed interfaces such as chip‑to‑chip interconnect, both on… more
- AMD (San Jose, CA)
- …AI and beyond. Together, we advance your career. The Role We are looking for a self‑motivated senior design engineer to be part of a leading team to drive ... technologies to market. As a key contributor, you will focus on RTL design and validation of high‑speed interfaces such as chip‑to‑chip interconnect, both on… more
- Capgemini Engineering (San Jose, CA)
- …Acquisition Manager in San Jose, California. The ideal candidate will possess strong RTL design skills and hands-on experience with lab equipment like ... oscilloscopes and multimeters. You will play a critical role in collaborating with cross-functional teams and implementing innovative methodologies. This role offers a competitive salary range and comprehensive benefits package, emphasizing well-being at all… more
- Intel (San Jose, CA)
- A leading semiconductor company in California is seeking a Senior DFT Design Engineer to develop and optimize comprehensive Design for Test solutions. ... BSCAN implementations. The ideal candidate should have extensive experience in digital design and a strong understanding of test strategies, contributing to advanced… more
- Renesas Electronics Corporation (San Francisco, CA)
- …global semiconductor company in San Francisco is looking for an experienced engineer specialized in ASIC/IC design . The position involves designing optimized ... should have over 10 years of experience in the IC design flow and be proficient in Verilog RTL coding. The role offers a hybrid work model, providing the… more
- Real Communications Inc (San Jose, CA)
- A leading semiconductor firm in San Jose, California, seeks a skilled engineer for RTL development of video CODECs including H.264 and HEVC. The ideal candidate ... will have over 7 years of experience in RTL coding and a strong background in video codec design . Familiarity with HEVC/H.264 reference code is a plus, and being… more
- Highbrow Technology Inc (San Jose, CA)
- Staff Machine Learning Engineer , LLM Fine‑Tuning (Verilog/ RTL Applications) We are looking for a Staff ML Engineer to lead fine-tuning and deployment of ... system design and communication skills. Preferred Qualifications Exposure to code/ RTL , Verilog, or EDA workflows . Experience with RAG, constrained decoding,… more
- Grafton Sciences (San Francisco, CA)
- …AI research company in San Francisco is seeking a Senior Toolchain Engineer specializing in firmware to design and implement automation pipelines and ... verification infrastructure. Candidates must have strong experience in digital design , integrating hardware protocols, and a solid background in verification. This… more
- Flux Computing (San Francisco, CA)
- Join to apply for the Senior / Staff Digital Design Engineer role at Flux Computing 1 day ago Be among the first 25 applicants Get AI-powered advice on this ... job and more exclusive features. The Role We are seeking highly skilled and motivated Senior /Staff Digital Design Engineers with a strong focus on CMOS digital … more
- Intel (San Jose, CA)
- Overview We are seeking a senior skilled DFT Design Engineer to develop and implement comprehensive Design for Test solutions across our semiconductor ... products. This role involves RTL design , verification, and manufacturing support for...the highest quality standards for high-volume manufacturing. As a Senior DFT Design Engineer , you… more
- SQL Pager LLC (San Francisco, CA)
- Principal/ Senior Staff/Staff ASIC Design Engineer (RISC-V) Client Overview Client is building the first latency optimized SoC for their industry. Using its ... Job Responsibilities . We are seeking a dedicated CPU design engineer as part of ASIC for...micro-architecture definition from given Marketing requirements. ◦ Expert in RTL Logic Design , CDC, RDC, Scan insertion,… more
- SQL Pager LLC (San Francisco, CA)
- Principal/ Senior Staff/Staff GPGPU Design Engineer Client Overview Client is building the first latency optimized SoC for their industry. Using its proven AI ... Responsibilities . We are seeking a dedicated hands-on GPGPU Design Engineer to help develop an GPGPU...micro-architecture definition from given Marketing requirements. ◦ Expert in RTL Logic Design , CDC, RDC, Scan insertion,… more
- WIT Recruiting (San Francisco, CA)
- Overview We are looking for a highly motivated FPGA Design Engineer to contribute to the development of advanced digital systems. In this role, you will own the ... the FPGA stack, ensuring robust performance and scalability. Core FPGA Design : Work on RTL design , simulation, synthesis, timing closure, and high-speed… more
- Pratt & Whitney (Boston, MA)
- …our mission today. This position is for a motivated Electrical or Computer Engineer to be involved in the design , implementation, verification, and integration ... selection Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration Recommend new tools… more
- Ethernovia (San Jose, CA)
- …and want to drive their design from concept to silicon to their next car. Senior ASIC Front-End Design Engineer Summary: As a Senior ASIC Front-End ... Engineering, Computer Science, or related field Minimum 10+ years of ASIC RTL design and/or architecture experience Proven track record with the development of… more
- Capgemini Engineering (San Jose, CA)
- …| Talent Acquisition Manager About the Job You're Considering Hands‑on experience with RTL design and Vivado Flow (IP Integrator) . Familiarity with essential ... and multimeter for testing and validation. Your Skills and Experience Proficiency in RTL design and Vivado Flow (IP Integrator) . Solid debugging capabilities… more
- Grafton Sciences (San Francisco, CA)
- Senior Toolchain Engineer , Firmware Join to apply for the Senior Toolchain Engineer , Firmware role at Grafton Sciences. About Grafton Sciences We're ... robust, and reproducible. This role is ideal for someone who can design production‑grade RTL and verification, understands FPGA/ASIC constraints deeply, and… more
- Ouster (San Francisco, CA)
- …hiring key roles across the company and need your help! Ouster Inc. is seeking a senior digital hardware FPGA design engineer to build the next-generation of ... and test features across our FPGA stack General FPGA development including RTL , simulation, high-speed digital design , DSP algorithm development, verification,… more
- TSMC (San Jose, CA)
- Senior Physical Design Engineer (7051) - TSMC Join to apply for the Senior Physical Design Engineer (7051) role at TSMC . Overview of Role As a ... Senior Physical Design Engineer , you...Senior Physical Design Engineer , you will be responsible for...development. Experiences in research projects or internship related to RTL coding, synthesis, digital design and testing,… more
