- Google Inc. (Sunnyvale, CA)
- A global technology company is seeking a DFT Engineer to shape the future of AI /ML hardware acceleration. The role involves defining and deploying advanced ... design-for-test methodologies, managing DFT architecture for complex digital chips. Candidates should possess...should possess a Bachelor's degree and extensive experience in DFT . This position is based in Sunnyvale, California, offering… more
- Google Inc. (Sunnyvale, CA)
- …complex digital designs, with a specific focus on TPU architecture and its integration within AI /ML-driven systems. As a DFT Engineer you will be responsible ... or equivalent practical experience. 5 years of experience in DFT architecture, implementation, and verification for SoCs. Experience in...this role, you'll work to shape the future of AI /ML hardware acceleration. You will have an opportunity to… more
- Google Inc. (Sunnyvale, CA)
- …its integration within AI /ML-driven systems. As a System on a Chip ( SoC ) Physical Design Engineer , you will collaborate with Register-Transfer Level (RTL), ... computer architecture. Experience in block/subchip level PnR for complex SoC . Experience with multiple-cycles of SoC in...this role, you'll work to shape the future of AI /ML hardware acceleration. You will have an opportunity to… more
- Advanced Micro Devices (Santa Clara, CA)
- …and non-coherent) Experience with modern heterogenous systems including CPU, GPU, and AI accelerators. Experience with SOC and IP creation automation for ... mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in… more
- Advanced Micro Devices (Santa Clara, CA)
- …mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in ... perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE...beyond. Together, we advance your career. THE ROLE: The SOC RTG team develops leading edge discrete graphics SOCs.… more
- Mythic, Inc. (Palo Alto, CA)
- …deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much ... easier and more affordable to deploy powerful AI solutions, from the data center to the edge...This Role We are seeking a Director / Principal Engineer of Digital Design Verification to provide technical and… more
- Theconstructsim (Milpitas, CA)
- Description We are seeking a Front-End SoC /ASIC Design Engineer for our SoC business unit. Responsibilities Support customer's design through all phases of ... Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/ DFT checks; Synthesis & supporting timing‑closure; Contribute to and support… more
- Google Inc. (Sunnyvale, CA)
- …designs, with a specific focus on TPU architecture and its integration within AI /ML‑driven systems. As a Physical Design Engineer , you will collaborate with ... Physical Design Engineer , University Graduate, PhD Apply Mid Experience driving...using Languages like Python, Tcl, Perl. Proficiency in fundamental SoC architecture and hardware description languages such as Verilog,… more
- Theconstructsim (Milpitas, CA)
- Front-End ASIC Design Engineer - Semiconductor Industry 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description ... Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/ DFT checks; Synthesis & supporting timing-closure; Contribute to and support… more
- Altera (San Jose, CA)
- …deploy, across the cloud to the edge, enabling limitless possibilities for AI . Our broad portfolio includes FPGAs, SoCs, CPLDs, IP, development tools, ... the world's #1 FPGA company!**About the Role**As a Sr. Physical Design Tech Lead/ Engineer at Altera, you will play a critical role in our backend implementation… more
- Theconstructsim (Milpitas, CA)
- …time off Relocation bonus Vision insurance Job Title: Front-End ASIC Design Engineer - Milpitas, CA Responsibilities Support customer's design through all phases of ... Architecture / micro‑Architecture; Logic Design; RTL integration and coding; Lint/CDC/ DFT checks; Synthesis & supporting timing‑closure; Contribute to and support… more
- Theconstructsim (Milpitas, CA)
- Front-End ASIC Design Engineer Milpitas, CA Description Milpitas, CA Benefits 401(k) 401(k) matching Relocation bonus Responsibilities Ensure designs meet product ... Architecture / micro‑Architecture; Logic Design; RTL integration and coding; Lint/CDC/ DFT checks; Synthesis & supporting timing‑closure; Contribute to and support… more
- Theconstructsim (Milpitas, CA)
- Job Title: Front-End ASIC Design Engineer Milpitas, CA Responsibilities Support customer's design through all phases of ASIC execution at Socionext. Ensure designs ... Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/ DFT checks; Synthesis & supporting timing-closure; Contribute to and support… more
- Apple Inc. (Cupertino, CA)
- …United States Hardware Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible ... part of your design responsibilities will include the development of analog DFT circuits and techniques essential for comprehensive PHY validation. You will develop… more
- Apple Inc. (Santa Clara, CA)
- …As part of our Silicon Technologies group, you'll pioneer the next generation of AI -powered design automation tools that will accelerate our processor and SoC ... our RTL-to-GDS implementation flows. You will be directly responsible for creating AI -powered agents using technologies like Model Context Protocol (MCP) that can… more
- Eridu Corporation (San Francisco, CA)
- Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today's ... performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems… more
- NVIDIA Corporation (Santa Clara, CA)
- …Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams.* Get involved in end-to-end cycle ... parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is...law.The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible… more
- Google (Sunnyvale, CA)
- SoC DFT Engineer , Google Cloud...specific focus on TPU architecture and its integration within AI /ML-driven systems. As a DFT Engineer ... equivalent practical experience. + 5 years of experience in DFT architecture, implementation, and verification for SoCs. + Experience...this role, you'll work to shape the future of AI /ML hardware acceleration. You will have an opportunity to… more
- NVIDIA (Santa Clara, CA)
- …and SOCs that power everything from AI to gaming! As a Senior SOC Design Engineer , you'll work at the forefront of technology, integrating advanced ASICs, ... NVIDIA is looking for a Senior SOC Design Engineer to join our...in ASIC design, Physical design, CAD, Package Design, Software, DFT , and more. Our ASICs pack hundreds of billions… more
- NVIDIA (Santa Clara, CA)
- We are seeking a skilled Hardware Application Engineer to provide complete SoC product and platform support across the full hardware lifecycle. In this role, you ... and complex design challenges. + Support product design reviews-offering recommendations, DFM/ DFT improvements, and risk mitigation strategies to OEM partners. +… more
