- Arm Limited (San Diego, CA)
- …and Experience : This role is for a Principal DFT Engineer / DFT STA Constraints Lead with 10+ years of experience in Design for Test. Understanding ... locations : San Jose , Austin , and San Diego . Responsibilities: Lead DFT design and STA constraints to meet design PPA targets. Coordinates DFT … more
- Broadcom Inc. (San Jose, CA)
- Staff DFT Engineer page is loaded## Staff DFT Engineerlocations: USA-CA San Jose Innovation Drivetime type: Full timeposted on: Posted Yesterdayjob ... before you apply.**## **Job Description:**We are looking for a staff DFT engineer with expertise in ...Verification skills include, Logic Equivalence checking and validating the STA constraints . Experience working with Gate level… more
- Hewlett Packard Enterprise Development LP (San Jose, CA)
- …issues including ATPG DRC violations, simulation mismatches, and timing violations.* Apply test constraints and perform STA analysis to ensure timing closure in ... next-generation networking platforms. We are looking for a seasoned**Design-for-Test ( DFT ) Engineer** to join our team and contribute to...using PrimeTime and Cadence Tempus.* Able to define test constraints and review STA reports to ensure… more
- Renesas Electronics Corporation (San Francisco, CA)
- …in either Verilog RTL coding and ASIC design methodology. Competence in developing design constraints for synthesis, STA and P&R handoff. Ability to work both ... Design optimized digital blocks meeting functional, cost and low power constraints and ensure spec compliance. Cover digital backend design from synthesis,… more
- Broadcom (San Jose, CA)
- …for test. **Responsibilities** + Own IP DFT architecture, implementation, verification, signoff STA constraints for DFT + Optimize DFT architecture ... Description:** Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate...debug with industry simulator tools + Experience in developing STA constraints for DFT logic/modes… more
- Micron Technology, Inc. (Folsom, CA)
- …of timing, area, power, and complexity trade-offs. + Experience with synthesis, constraints , and verification tools (Lint, CDC, LEC, STA ). + Excellent ... communication skills. **Preferred Qualifications** + Experience with UPF, power analysis, DFT /scan insertion, ATPG, and timing model generation. + Proficiency in… more
